12 Commits

Author SHA1 Message Date
László Monda
7eb190489b Bump firmware version to 8.4.3, update changelog, package.json, versions.h 2018-08-12 10:41:43 +02:00
László Monda
640c034111 Compensate "double tap to lock layer" timeouts for the timer fix to make them as long as before 8.3.3 2018-08-11 01:53:45 +02:00
László Monda
a6f12848ed Add timer related changelog entry. 2018-08-11 01:48:44 +02:00
László Monda
47f6a27e48 Move left/src/init_clock.[ch] to shared/slave 2018-08-06 00:16:26 +02:00
László Monda
9cc383a91d Delete config.h 2018-08-05 22:49:31 +02:00
László Monda
a441cdf5d2 Delete debug_over_spi.[ch] 2018-08-05 22:47:55 +02:00
László Monda
8297dd5c48 Don't include the debug over SPI code from any file. 2018-08-05 22:44:11 +02:00
László Monda
225a481938 Fix coding style. 2018-08-05 22:31:48 +02:00
László Monda
5572952dc8 Use one liner comment style. 2018-08-05 22:28:30 +02:00
László Monda
7d011237f8 Always use the I2C watchdog for the left half. Remove I2C_WATCHDOG and relevant preprocessor stuff. 2018-08-05 22:24:34 +02:00
László Monda
1a47c6e629 Minor MCUXpresso .cproject file modification. 2018-08-05 22:22:21 +02:00
László Monda
047a232e7e Update .cproject file to make MCUXpresso IDE not pop up the warning regarding SDK version. 2018-08-04 23:48:11 +02:00
16 changed files with 92 additions and 209 deletions

View File

@@ -5,6 +5,12 @@ All notable changes to this project will be documented in this file.
The format is loosely based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/)
and this project adheres to the [UHK Versioning](VERSIONING.md) conventions.
## [8.4.3] - 2018-08-12
Device Protocol: 4.4.0 | Module Protocol: 4.0.0 | User Config: 4.1.0 | Hardware Config: 1.0.0
- Compensate "double tap to lock layer" timeouts for the timer fix to make them as long as before 8.3.3
## [8.4.2] - 2018-08-02
Device Protocol: 4.4.0 | Module Protocol: 4.0.0 | User Config: 4.1.0 | Hardware Config: 1.0.0
@@ -32,6 +38,7 @@ Device Protocol: 4.**4.0** | Module Protocol: 4.0.0 | User Config: 4.1.0 | Hardw
Device Protocol: 4.3.1 | Module Protocol: 4.0.0 | User Config: 4.1.0 | Hardware Config: 1.0.0
- Implement the macro engine.
- Fix the timer which makes it tick twice as fast as before.
- Fix the nondeterministic bug that made USB hang.
- Restore the Windows related commits of firmware 8.3.1 because the USB hang bug has been fixed.
- Restore debouncing to 100ms until it gets really fixed.

View File

@@ -44,7 +44,8 @@ SOURCE = $(wildcard src/*.c) \
../lib/KSDK_2.0_MKL03Z8xxx4/devices/MKL03Z4/drivers/fsl_lptmr.c \
../lib/KSDK_2.0_MKL03Z8xxx4/devices/MKL03Z4/drivers/fsl_spi.c \
../lib/KSDK_2.0_MKL03Z8xxx4/devices/MKL03Z4/drivers/fsl_tpm.c \
$(wildcard ../shared/*.c)
$(wildcard ../shared/*.c) \
$(wildcard ../shared/slave/*.c)
# Header files.
IPATH = src \

View File

@@ -1,13 +0,0 @@
#ifndef __CONFIG_H__
#define __CONFIG_H__
// Macros:
#define I2C_WATCHDOG_VALUE_REINIT 1
#define I2C_WATCHDOG_VALUE_REBOOT 2
// #define DEBUG_OVER_SPI
#define I2C_WATCHDOG I2C_WATCHDOG_VALUE_REINIT
// #define I2C_WATCHDOG I2C_WATCHDOG_VALUE_REBOOT
#endif

View File

@@ -1,56 +0,0 @@
#ifdef DEBUG_OVER_SPI
#include "debug_over_spi.h"
#include "config.h"
#include "fsl_gpio.h"
#define EXAMPLE_SPI_MASTER (SPI0)
#define EXAMPLE_SPI_MASTER_SOURCE_CLOCK (kCLOCK_BusClk)
#define BUFFER_SIZE (64)
static uint8_t srcBuff[BUFFER_SIZE];
static spi_transfer_t xfer = {0};
static spi_master_config_t userConfig;
spi_master_handle_t handle;
static volatile bool masterFinished = true;
static void masterCallback(SPI_Type *base, spi_master_handle_t *masterHandle, status_t status, void *userData)
{
masterFinished = true;
}
void DebugOverSpi_Init(void)
{
CLOCK_EnableClock(DEBUG_OVER_SPI_MOSI_CLOCK);
CLOCK_EnableClock(DEBUG_OVER_SPI_SCK_CLOCK);
PORT_SetPinMux(DEBUG_OVER_SPI_MOSI_PORT, DEBUG_OVER_SPI_MOSI_PIN, kPORT_MuxAlt3);
PORT_SetPinMux(DEBUG_OVER_SPI_SCK_PORT, DEBUG_OVER_SPI_SCK_PIN, kPORT_MuxAlt3);
GPIO_PinInit(DEBUG_OVER_SPI_MOSI_GPIO, DEBUG_OVER_SPI_MOSI_PIN, &(gpio_pin_config_t){kGPIO_DigitalOutput, 0});
GPIO_PinInit(DEBUG_OVER_SPI_SCK_GPIO, DEBUG_OVER_SPI_SCK_PIN, &(gpio_pin_config_t){kGPIO_DigitalOutput, 0});
GPIO_SetPinsOutput(DEBUG_OVER_SPI_MOSI_GPIO, 1U << DEBUG_OVER_SPI_MOSI_PIN);
GPIO_SetPinsOutput(DEBUG_OVER_SPI_SCK_GPIO, 1U << DEBUG_OVER_SPI_SCK_PIN);
SPI_MasterGetDefaultConfig(&userConfig);
uint32_t srcFreq = CLOCK_GetFreq(EXAMPLE_SPI_MASTER_SOURCE_CLOCK);
SPI_MasterInit(EXAMPLE_SPI_MASTER, &userConfig, srcFreq);
SPI_MasterTransferCreateHandle(EXAMPLE_SPI_MASTER, &handle, masterCallback, NULL);
}
void DebugOverSpi_Send(uint8_t *tx, uint8_t len)
{
if (masterFinished) {
masterFinished = false;
memcpy(srcBuff, tx, MIN(BUFFER_SIZE, len));
xfer.txData = srcBuff;
xfer.dataSize = len;
SPI_MasterTransferNonBlocking(EXAMPLE_SPI_MASTER, &handle, &xfer);
}
}
#endif

View File

@@ -1,34 +0,0 @@
#ifdef DEBUG_OVER_SPI
#ifndef __DEBUG_OVER_SPI_H__
#define __DEBUG_OVER_SPI_H__
// Includes:
#include "fsl_common.h"
#include "fsl_port.h"
#include "fsl_spi.h"
// Macros:
#define DEBUG_OVER_SPI_MOSI_PORT PORTA
#define DEBUG_OVER_SPI_MOSI_GPIO GPIOA
#define DEBUG_OVER_SPI_MOSI_CLOCK kCLOCK_PortA
#define DEBUG_OVER_SPI_MOSI_PIN 7
#define DEBUG_OVER_SPI_SCK_PORT PORTB
#define DEBUG_OVER_SPI_SCK_GPIO GPIOB
#define DEBUG_OVER_SPI_SCK_CLOCK kCLOCK_PortB
#define DEBUG_OVER_SPI_SCK_PIN 0
// Functions:
void DebugOverSpi_Init(void);
void DebugOverSpi_Send(uint8_t *tx, uint8_t len);
#endif
#else
#define DebugOverSpi_Init()
#define DebugOverSpi_Send(tx, len)
#endif

View File

@@ -3,40 +3,31 @@
#include "i2c_watchdog.h"
#include "test_led.h"
#include "init_peripherals.h"
#include "config.h"
/* NOTE: Because of a bug in the ROM bootloader of the KL03Z, the watchdog timer is disabled and cannot be re-enabled.
* See https://community.nxp.com/thread/457893
* Therefore the hardware watchdog timer cannot be used without an extra way to enter bootloader or application mode.
*/
#ifdef I2C_WATCHDOG
static uint32_t prevWatchdogCounter = 0;
static uint32_t I2cWatchdog_RecoveryCounter; /* counter for how many times we had to recover and restart */
// NOTE: Because of a bug in the ROM bootloader of the KL03Z, the watchdog timer is disabled and cannot be re-enabled.
// See https://community.nxp.com/thread/457893
// Therefore the hardware watchdog timer cannot be used without an extra way to enter bootloader or application mode.
static uint32_t prevWatchdogCounter = 0;
static uint32_t I2cWatchdog_RecoveryCounter; // Counter for how many times we had to recover and restart
void RunWatchdog(void)
{
static volatile uint32_t I2cWatchdog_WatchCounter = 0; /* counter for timer */
static int cntr = 0;
static volatile uint32_t I2cWatchdog_WatchCounter = 0; // Counter for timer
static int counter = 0;
cntr++;
if (cntr==100) { /* we get called from KEY_SCANNER_HANDLER() which runs at 1ms, thus scaling down by 100 here to get 100 ms period */
cntr=0;
counter++;
if (counter == 100) { // We get called from KEY_SCANNER_HANDLER() which runs at 1ms, thus scaling down by 100 here to get 100 ms period
counter=0;
TestLed_Toggle();
I2cWatchdog_WatchCounter++;
if (I2cWatchdog_WatchCounter>10) { /* do not check within the first 1000 ms, as I2C might not be running yet */
if (I2cWatchdog_WatchCounter > 10) { // Do not check within the first 1000 ms, as I2C might not be running yet
if (I2C_Watchdog == prevWatchdogCounter) { // Restart I2C if there hasn't been any interrupt during 100 ms. I2C_Watchdog gets incremented for every I2C transaction
I2cWatchdog_RecoveryCounter++;
#if I2C_WATCHDOG == I2C_WATCHDOG_VALUE_REBOOT
NVIC_SystemReset();
#endif
#if I2C_WATCHDOG == I2C_WATCHDOG_VALUE_REINIT
I2C_SlaveDeinit(I2C_BUS_BASEADDR);
initI2c();
#endif
}
}
prevWatchdogCounter = I2C_Watchdog; /* remember previous counter */
prevWatchdogCounter = I2C_Watchdog;
}
}
#endif

View File

@@ -9,7 +9,6 @@
#include "led_pwm.h"
#include "slave_protocol_handler.h"
#include "i2c_watchdog.h"
#include "debug_over_spi.h"
#include "main.h"
i2c_slave_config_t slaveConfig;
@@ -23,7 +22,6 @@ static void i2cSlaveCallback(I2C_Type *base, i2c_slave_transfer_t *xfer, void *u
{
dosBuffer[0] = xfer->event;
dosBuffer[1] = userData;
DebugOverSpi_Send(dosBuffer, 2);
switch (xfer->event) {
case kI2C_SlaveTransmitEvent:
@@ -86,6 +84,5 @@ void InitPeripherals(void)
InitLedDriver();
TestLed_Init();
LedPwm_Init();
DebugOverSpi_Init();
initI2c();
}

View File

@@ -1,6 +1,5 @@
#include "fsl_lptmr.h"
#include "key_scanner.h"
#include "config.h"
#include "i2c_watchdog.h"
void KEY_SCANNER_HANDLER(void)

View File

@@ -1,9 +1,8 @@
#include "main.h"
#include "init_clock.h"
#include "slave/init_clock.h"
#include "init_peripherals.h"
#include "bootloader.h"
#include <stdio.h>
#include "config.h"
#include "key_scanner.h"
DEFINE_BOOTLOADER_CONFIG_AREA(I2C_ADDRESS_LEFT_KEYBOARD_HALF_BOOTLOADER)
@@ -15,11 +14,7 @@ key_matrix_t keyMatrix = {
{PORTB, GPIOB, kCLOCK_PortB, 11},
{PORTA, GPIOA, kCLOCK_PortA, 6},
{PORTA, GPIOA, kCLOCK_PortA, 8},
#ifdef DEBUG_OVER_SPI
{PORTA, GPIOA, kCLOCK_PortA, 8},
#else
{PORTB, GPIOB, kCLOCK_PortB, 0},
#endif
{PORTB, GPIOB, kCLOCK_PortB, 6},
{PORTA, GPIOA, kCLOCK_PortA, 3},
{PORTA, GPIOA, kCLOCK_PortA, 12}
@@ -28,11 +23,7 @@ key_matrix_t keyMatrix = {
{PORTB, GPIOB, kCLOCK_PortB, 7},
{PORTB, GPIOB, kCLOCK_PortB, 10},
{PORTA, GPIOA, kCLOCK_PortA, 5},
#ifdef DEBUG_OVER_SPI
{PORTA, GPIOA, kCLOCK_PortA, 5},
#else
{PORTA, GPIOA, kCLOCK_PortA, 7},
#endif
{PORTA, GPIOA, kCLOCK_PortA, 4}
}
};

View File

@@ -460,73 +460,73 @@
<storageModule moduleId="com.crt.config">
<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;
&lt;TargetConfig&gt;
&lt;Properties property_3="NXP" property_4="MK22FN512xxx12" property_count="5" version="70200"/&gt;
&lt;Properties property_3="NXP" property_4="MK22FN512xxx12" property_count="5" version="100200"/&gt;
&lt;infoList vendor="NXP"&gt;&lt;info chip="MK22FN512xxx12" name="MK22FN512xxx12"&gt;&lt;chip&gt;&lt;name&gt;MK22FN512xxx12&lt;/name&gt;
&lt;family&gt;K2x&lt;/family&gt;
&lt;vendor&gt;NXP&lt;/vendor&gt;
&lt;memory can_program="true" id="Flash" is_ro="true" size="512" type="Flash"/&gt;
&lt;memory id="RAM" size="128" type="RAM"/&gt;
&lt;memoryInstance derived_from="Flash" driver="FTFA_2K.cfx" id="PROGRAM_FLASH" location="0x0" size="0x80000"/&gt;
&lt;memoryInstance derived_from="RAM" id="SRAM_UPPER" location="0x20000000" size="0x10000"/&gt;
&lt;memoryInstance derived_from="RAM" id="SRAM_LOWER" location="0x1fff0000" size="0x10000"/&gt;
&lt;peripheralInstance derived_from="FTFA_FlashConfig" id="FTFA_FlashConfig" location="0x400"/&gt;
&lt;peripheralInstance derived_from="DMA" id="DMA" location="0x40008000"/&gt;
&lt;peripheralInstance derived_from="FB" id="FB" location="0x4000C000"/&gt;
&lt;peripheralInstance derived_from="FMC" id="FMC" location="0x4001F000"/&gt;
&lt;peripheralInstance derived_from="FTFA" id="FTFA" location="0x40020000"/&gt;
&lt;peripheralInstance derived_from="DMAMUX" id="DMAMUX" location="0x40021000"/&gt;
&lt;peripheralInstance derived_from="FTM0" id="FTM0" location="0x40038000"/&gt;
&lt;peripheralInstance derived_from="FTM1" id="FTM1" location="0x40039000"/&gt;
&lt;peripheralInstance derived_from="FTM2" id="FTM2" location="0x4003A000"/&gt;
&lt;peripheralInstance derived_from="FTM3" id="FTM3" location="0x40026000"/&gt;
&lt;peripheralInstance derived_from="ADC0" id="ADC0" location="0x4003B000"/&gt;
&lt;peripheralInstance derived_from="ADC1" id="ADC1" location="0x40027000"/&gt;
&lt;peripheralInstance derived_from="DAC0" id="DAC0" location="0x4003F000"/&gt;
&lt;peripheralInstance derived_from="DAC1" id="DAC1" location="0x40028000"/&gt;
&lt;peripheralInstance derived_from="RNG" id="RNG" location="0x40029000"/&gt;
&lt;peripheralInstance derived_from="LPUART0" id="LPUART0" location="0x4002A000"/&gt;
&lt;peripheralInstance derived_from="SPI0" id="SPI0" location="0x4002C000"/&gt;
&lt;peripheralInstance derived_from="SPI1" id="SPI1" location="0x4002D000"/&gt;
&lt;peripheralInstance derived_from="I2S0" id="I2S0" location="0x4002F000"/&gt;
&lt;peripheralInstance derived_from="CRC" id="CRC" location="0x40032000"/&gt;
&lt;peripheralInstance derived_from="PDB0" id="PDB0" location="0x40036000"/&gt;
&lt;peripheralInstance derived_from="PIT" id="PIT" location="0x40037000"/&gt;
&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x4003D000"/&gt;
&lt;peripheralInstance derived_from="RFVBAT" id="RFVBAT" location="0x4003E000"/&gt;
&lt;peripheralInstance derived_from="LPTMR0" id="LPTMR0" location="0x40040000"/&gt;
&lt;peripheralInstance derived_from="RFSYS" id="RFSYS" location="0x40041000"/&gt;
&lt;peripheralInstance derived_from="SIM" id="SIM" location="0x40047000"/&gt;
&lt;peripheralInstance derived_from="PORTA" id="PORTA" location="0x40049000"/&gt;
&lt;peripheralInstance derived_from="PORTB" id="PORTB" location="0x4004A000"/&gt;
&lt;peripheralInstance derived_from="PORTC" id="PORTC" location="0x4004B000"/&gt;
&lt;peripheralInstance derived_from="PORTD" id="PORTD" location="0x4004C000"/&gt;
&lt;peripheralInstance derived_from="PORTE" id="PORTE" location="0x4004D000"/&gt;
&lt;peripheralInstance derived_from="WDOG" id="WDOG" location="0x40052000"/&gt;
&lt;peripheralInstance derived_from="EWM" id="EWM" location="0x40061000"/&gt;
&lt;peripheralInstance derived_from="MCG" id="MCG" location="0x40064000"/&gt;
&lt;peripheralInstance derived_from="OSC" id="OSC" location="0x40065000"/&gt;
&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x40066000"/&gt;
&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x40067000"/&gt;
&lt;peripheralInstance derived_from="UART0" id="UART0" location="0x4006A000"/&gt;
&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x4006B000"/&gt;
&lt;peripheralInstance derived_from="UART2" id="UART2" location="0x4006C000"/&gt;
&lt;peripheralInstance derived_from="USB0" id="USB0" location="0x40072000"/&gt;
&lt;peripheralInstance derived_from="CMP0" id="CMP0" location="0x40073000"/&gt;
&lt;peripheralInstance derived_from="CMP1" id="CMP1" location="0x40073008"/&gt;
&lt;peripheralInstance derived_from="VREF" id="VREF" location="0x40074000"/&gt;
&lt;peripheralInstance derived_from="LLWU" id="LLWU" location="0x4007C000"/&gt;
&lt;peripheralInstance derived_from="PMC" id="PMC" location="0x4007D000"/&gt;
&lt;peripheralInstance derived_from="SMC" id="SMC" location="0x4007E000"/&gt;
&lt;peripheralInstance derived_from="RCM" id="RCM" location="0x4007F000"/&gt;
&lt;peripheralInstance derived_from="GPIOA" id="GPIOA" location="0x400FF000"/&gt;
&lt;peripheralInstance derived_from="GPIOB" id="GPIOB" location="0x400FF040"/&gt;
&lt;peripheralInstance derived_from="GPIOC" id="GPIOC" location="0x400FF080"/&gt;
&lt;peripheralInstance derived_from="GPIOD" id="GPIOD" location="0x400FF0C0"/&gt;
&lt;peripheralInstance derived_from="GPIOE" id="GPIOE" location="0x400FF100"/&gt;
&lt;peripheralInstance derived_from="SystemControl" id="SystemControl" location="0xE000E000"/&gt;
&lt;peripheralInstance derived_from="SysTick" id="SysTick" location="0xE000E010"/&gt;
&lt;peripheralInstance derived_from="NVIC" id="NVIC" location="0xE000E100"/&gt;
&lt;peripheralInstance derived_from="MCM" id="MCM" location="0xE0080000"/&gt;
&lt;memory can_program="true" id="Flash" is_ro="true" size="0" type="Flash"/&gt;
&lt;memory id="RAM" size="0" type="RAM"/&gt;
&lt;memoryInstance derived_from="Flash" driver="FTFA_2K.cfx" id="PROGRAM_FLASH" location="0x00000000" size="0x00080000"/&gt;
&lt;memoryInstance derived_from="RAM" id="SRAM_UPPER" location="0x20000000" size="0x00010000"/&gt;
&lt;memoryInstance derived_from="RAM" id="SRAM_LOWER" location="0x1fff0000" size="0x00010000"/&gt;
&lt;peripheralInstance derived_from="FTFA-FlashConfig" determined="infoFile" id="FTFA-FlashConfig" location="0x400"/&gt;
&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x40008000"/&gt;
&lt;peripheralInstance derived_from="FB" determined="infoFile" id="FB" location="0x4000C000"/&gt;
&lt;peripheralInstance derived_from="FMC" determined="infoFile" id="FMC" location="0x4001F000"/&gt;
&lt;peripheralInstance derived_from="FTFA" determined="infoFile" id="FTFA" location="0x40020000"/&gt;
&lt;peripheralInstance derived_from="DMAMUX" determined="infoFile" id="DMAMUX" location="0x40021000"/&gt;
&lt;peripheralInstance derived_from="FTM0" determined="infoFile" id="FTM0" location="0x40038000"/&gt;
&lt;peripheralInstance derived_from="FTM1" determined="infoFile" id="FTM1" location="0x40039000"/&gt;
&lt;peripheralInstance derived_from="FTM2" determined="infoFile" id="FTM2" location="0x4003A000"/&gt;
&lt;peripheralInstance derived_from="FTM3" determined="infoFile" id="FTM3" location="0x40026000"/&gt;
&lt;peripheralInstance derived_from="ADC0" determined="infoFile" id="ADC0" location="0x4003B000"/&gt;
&lt;peripheralInstance derived_from="ADC1" determined="infoFile" id="ADC1" location="0x40027000"/&gt;
&lt;peripheralInstance derived_from="DAC0" determined="infoFile" id="DAC0" location="0x4003F000"/&gt;
&lt;peripheralInstance derived_from="DAC1" determined="infoFile" id="DAC1" location="0x40028000"/&gt;
&lt;peripheralInstance derived_from="RNG" determined="infoFile" id="RNG" location="0x40029000"/&gt;
&lt;peripheralInstance derived_from="LPUART0" determined="infoFile" id="LPUART0" location="0x4002A000"/&gt;
&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x4002C000"/&gt;
&lt;peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4002D000"/&gt;
&lt;peripheralInstance derived_from="I2S0" determined="infoFile" id="I2S0" location="0x4002F000"/&gt;
&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x40032000"/&gt;
&lt;peripheralInstance derived_from="PDB0" determined="infoFile" id="PDB0" location="0x40036000"/&gt;
&lt;peripheralInstance derived_from="PIT" determined="infoFile" id="PIT" location="0x40037000"/&gt;
&lt;peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x4003D000"/&gt;
&lt;peripheralInstance derived_from="RFVBAT" determined="infoFile" id="RFVBAT" location="0x4003E000"/&gt;
&lt;peripheralInstance derived_from="LPTMR0" determined="infoFile" id="LPTMR0" location="0x40040000"/&gt;
&lt;peripheralInstance derived_from="RFSYS" determined="infoFile" id="RFSYS" location="0x40041000"/&gt;
&lt;peripheralInstance derived_from="SIM" determined="infoFile" id="SIM" location="0x40047000"/&gt;
&lt;peripheralInstance derived_from="PORTA" determined="infoFile" id="PORTA" location="0x40049000"/&gt;
&lt;peripheralInstance derived_from="PORTB" determined="infoFile" id="PORTB" location="0x4004A000"/&gt;
&lt;peripheralInstance derived_from="PORTC" determined="infoFile" id="PORTC" location="0x4004B000"/&gt;
&lt;peripheralInstance derived_from="PORTD" determined="infoFile" id="PORTD" location="0x4004C000"/&gt;
&lt;peripheralInstance derived_from="PORTE" determined="infoFile" id="PORTE" location="0x4004D000"/&gt;
&lt;peripheralInstance derived_from="WDOG" determined="infoFile" id="WDOG" location="0x40052000"/&gt;
&lt;peripheralInstance derived_from="EWM" determined="infoFile" id="EWM" location="0x40061000"/&gt;
&lt;peripheralInstance derived_from="MCG" determined="infoFile" id="MCG" location="0x40064000"/&gt;
&lt;peripheralInstance derived_from="OSC" determined="infoFile" id="OSC" location="0x40065000"/&gt;
&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40066000"/&gt;
&lt;peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40067000"/&gt;
&lt;peripheralInstance derived_from="UART0" determined="infoFile" id="UART0" location="0x4006A000"/&gt;
&lt;peripheralInstance derived_from="UART1" determined="infoFile" id="UART1" location="0x4006B000"/&gt;
&lt;peripheralInstance derived_from="UART2" determined="infoFile" id="UART2" location="0x4006C000"/&gt;
&lt;peripheralInstance derived_from="USB0" determined="infoFile" id="USB0" location="0x40072000"/&gt;
&lt;peripheralInstance derived_from="CMP0" determined="infoFile" id="CMP0" location="0x40073000"/&gt;
&lt;peripheralInstance derived_from="CMP1" determined="infoFile" id="CMP1" location="0x40073008"/&gt;
&lt;peripheralInstance derived_from="VREF" determined="infoFile" id="VREF" location="0x40074000"/&gt;
&lt;peripheralInstance derived_from="LLWU" determined="infoFile" id="LLWU" location="0x4007C000"/&gt;
&lt;peripheralInstance derived_from="PMC" determined="infoFile" id="PMC" location="0x4007D000"/&gt;
&lt;peripheralInstance derived_from="SMC" determined="infoFile" id="SMC" location="0x4007E000"/&gt;
&lt;peripheralInstance derived_from="RCM" determined="infoFile" id="RCM" location="0x4007F000"/&gt;
&lt;peripheralInstance derived_from="GPIOA" determined="infoFile" id="GPIOA" location="0x400FF000"/&gt;
&lt;peripheralInstance derived_from="GPIOB" determined="infoFile" id="GPIOB" location="0x400FF040"/&gt;
&lt;peripheralInstance derived_from="GPIOC" determined="infoFile" id="GPIOC" location="0x400FF080"/&gt;
&lt;peripheralInstance derived_from="GPIOD" determined="infoFile" id="GPIOD" location="0x400FF0C0"/&gt;
&lt;peripheralInstance derived_from="GPIOE" determined="infoFile" id="GPIOE" location="0x400FF100"/&gt;
&lt;peripheralInstance derived_from="SystemControl" determined="infoFile" id="SystemControl" location="0xE000E000"/&gt;
&lt;peripheralInstance derived_from="SysTick" determined="infoFile" id="SysTick" location="0xE000E010"/&gt;
&lt;peripheralInstance derived_from="NVIC" determined="infoFile" id="NVIC" location="0xE000E100"/&gt;
&lt;peripheralInstance derived_from="MCM" determined="infoFile" id="MCM" location="0xE0080000"/&gt;
&lt;/chip&gt;
&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;
&lt;family&gt;Cortex-M&lt;/family&gt;
@@ -538,6 +538,6 @@
</storageModule>
<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
<sdkName>SDK_2.x_MK22FN512xxx12</sdkName>
<sdkVersion>2.3.1</sdkVersion>
<sdkVersion>2.2.0</sdkVersion>
</storageModule>
</cproject>

View File

@@ -20,8 +20,8 @@
static uint32_t mouseUsbReportUpdateTime = 0;
static uint32_t mouseElapsedTime;
uint16_t DoubleTapSwitchLayerTimeout = 150;
static uint16_t DoubleTapSwitchLayerReleaseTimeout = 100;
uint16_t DoubleTapSwitchLayerTimeout = 300;
static uint16_t DoubleTapSwitchLayerReleaseTimeout = 200;
static bool activeMouseStates[ACTIVE_MOUSE_STATES_COUNT];
bool TestUsbStack = false;

View File

@@ -15,7 +15,7 @@
"commander": "^2.11.0",
"shelljs": "^0.7.8"
},
"firmwareVersion": "8.4.2",
"firmwareVersion": "8.4.3",
"deviceProtocolVersion": "4.4.0",
"moduleProtocolVersion": "4.0.0",
"userConfigVersion": "4.1.0",

View File

@@ -20,7 +20,7 @@
#define FIRMWARE_MAJOR_VERSION 8
#define FIRMWARE_MINOR_VERSION 4
#define FIRMWARE_PATCH_VERSION 2
#define FIRMWARE_PATCH_VERSION 3
#define DEVICE_PROTOCOL_MAJOR_VERSION 4
#define DEVICE_PROTOCOL_MINOR_VERSION 4