![]() |
Kinetis Bootloader Host
2.0.0
Host Tools for Kinetis devices
|
Classes | |
| union | standard_version_t |
| struct | standard_version_t.B |
| struct | SFLASH_CONFIGURATION_PARAM_PTR |
| QuadSPI Config block structure. More... | |
Enumerations | |
| enum | __qspi_config_block_tags { kQspiConfigTag = FOUR_CHAR_CODE('k', 'q', 'c', 'f'), kQspiVersionTag = FOUR_CHAR_CODE(0, 1, 1, 'Q') } |
| enum | qspiflash_mode_option_t { kQspiFlashMode_Serial = 0, kQspiFlashMode_Parallel = 1 } |
| QSPI Flash mode options. More... | |
| enum | qspiflash_pad_t { kQspiFlashPad_Single = 0, kQspiFlashPad_Dual = 1, kQspiFlashPad_Quad = 2, kQspiFlashPad_Octal = 3 } |
| External spi flash pad definition. More... | |
| enum | qspi_serial_clock_freq_t { kQspiSerialClockFreq_Low = 0, kQspiSerialClockFreq_Mid = 1, kQspiSerialClockFreq_High = 2 } |
| QSPI Serial Clock Frequency options. More... | |
| enum | qspi_port_enable_t { kQspiPort_EnablePortA = 0U, kQspiPort_EnableBothPorts = 1 } |
| Port Enablement Option. More... | |
| enum | qspi_ahb_data_transfer_size_t { kQspiAHBDataTransferSize_64Bytes = 8U, kQspiAHBDataTransferSize_256Bytes = 32U } |
| Definition for AHB data tranfer size. More... | |
Functions | |
| int | main (void) |
Variables | |
| uint32_t | standard_version_t::bugfix: 8 |
| bugfix version [7:0] | |
| uint32_t | standard_version_t::minor: 8 |
| minor version [15:8] | |
| uint32_t | standard_version_t::major: 8 |
| major version [23:16] | |
| uint32_t | standard_version_t::name: 8 |
| name [31:24] | |
| struct { | |
| uint32_t | bugfix: 8 |
| bugfix version [7:0] | |
| uint32_t | minor: 8 |
| minor version [15:8] | |
| uint32_t | major: 8 |
| major version [23:16] | |
| uint32_t | name: 8 |
| name [31:24] | |
| } | standard_version_t::B |
| uint32_t | standard_version_t::version |
| combined version numbers | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::tag |
| Set to magic number of 'kqcf'. | |
| standard_version_t | SFLASH_CONFIGURATION_PARAM_PTR::version |
| version of config struct | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::lengthInBytes |
| Total length of strcut in bytes. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_loopback |
| Sets DQS LoopBack Mode to enable Dummy Pad MCR[24]. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::data_hold_time |
| Serial Flash data hold time, valid value: 0/1/2. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::reserved0 [2] |
| Reserved for K80. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::device_mode_config_en |
| Determine if it is required to config working mode of external spi flash. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::device_cmd |
| Command to be tranferred to device. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::write_cmd_ipcr |
| IPCR value of Write command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::word_addressable |
| Determine if the serial flash is word addressable. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::cs_hold_time |
| CS hold time in terms of serial clock.(for example 1 serial clock cyle) | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::cs_setup_time |
| CS setup time in terms of serial clock.(for example 1 serial clock cyle) | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_A1_size |
| Size of flash connected on QSPI0A Ports and QSPI0A_SS0, in terms of Bytes. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_A2_size |
| Size of flash connected on QSPI0A Ports and QSPI0A_SS1, in terms of Bytes. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_B1_size |
| Size of flash connected on QSPI0B Ports and QSPI0B_SS0, in terms of Bytes. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_B2_size |
| Size of flash connected on QSPI0B Ports and QSPI0B_SS1, in terms of Bytes. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sclk_freq |
| In 00 - 24MHz, 01 - 48MHz, 10 - 96MHz,(only for SDR Mode) | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::busy_bit_offset |
| Flash device busy bit offset in status register. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_type |
| SPI flash type: 0-Single,1–Dual 2–Quad, 3– Octal. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sflash_port |
| 0–Only Port-A, 1–Both PortA and PortB | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::ddr_mode_enable |
| Enable DDR mode if set to TRUE. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_enable |
| Enable DQS mode if set to TRUE. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::parallel_mode_enable |
| Enable Individual or parrallel mode. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::portA_cs1 |
| Enable PORTA CS1. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::portB_cs1 |
| Enable PORTB CS1. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::fsphs |
| Full speed delay selection for SDR instructions. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::fsdly |
| Full speed phase selection for SDR instructions. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::ddrsmp |
| Select the sampling point for incomming data when serial flash is in DDR mdoe. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::look_up_table [QSPI_LUT_MAX_ENTRIES] |
| Set of seq to perform optimum read on SFLASH as as per vendor SFLASH. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::column_address_space |
| The width of the column address. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::config_cmd_en |
| Enable config commands. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::config_cmds [QSPI_PRE_CMD_CNT] |
| Config comands, used to configure nor flash. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::config_cmds_args [QSPI_PRE_CMD_CNT] |
| Config commands arguments. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::differential_clock_pin_enable |
| Differential flash clock pins enable. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::flash_CK2_clock_pin_enable |
| Flash CK2 clock pin enable. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_inverse_sel |
| Select clock source for internal DQS generation. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_latency_enable |
| DQS Latency Enable. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_loopback_internal |
| 0: dqs loopback from pad, 1: dqs loopback internally | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_phase_sel |
| dqs phase sel | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_fa_delay_chain_sel |
| dqs fa delay chain selection | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::dqs_fb_delay_chain_sel |
| dqs fb delay chain selection | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::reserved1 [2] |
| reserved | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::pagesize |
| page Size of Serial Flash | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::sectorsize |
| sector Size of Serial Flash | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::timeout_milliseconds |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::ips_command_second_divider |
| second devider for all IPS commands. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::need_multi_phases |
| Determine if multiple hases command are needed. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::is_spansion_hyperflash |
| Determine if connected spi flash device belongs to Hyperflash family. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::pre_read_status_cmd_address_offset |
| Address for PreReadStatus command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::pre_unlock_cmd_address_offset |
| Address for PreWriteEnable command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::unlock_cmd_address_offset |
| Address for WriteEnable command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::pre_program_cmd_address_offset |
| Address for PreProgram command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::pre_erase_cmd_address_offset |
| Address for PreErase command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::erase_all_cmd_address_offset |
| Address for EraseAll command. | |
| uint32_t | SFLASH_CONFIGURATION_PARAM_PTR::reserved2 [3] |
| Reserved words to make sure qspi config block is page-aligend. | |
| union standard_version_t |
| Class Members | ||
|---|---|---|
| struct standard_version_t | B | |
| uint32_t | version | combined version numbers |
| struct standard_version_t.B |
| struct qspi_config_t |
QuadSPI Config block structure.
Collaboration diagram for SFLASH_CONFIGURATION_PARAM_PTR:| Class Members | ||
|---|---|---|
| uint32_t | busy_bit_offset | Flash device busy bit offset in status register. |
| uint32_t | column_address_space | The width of the column address. |
| uint32_t | config_cmd_en | Enable config commands. |
| uint32_t | config_cmds[QSPI_PRE_CMD_CNT] | Config comands, used to configure nor flash. |
| uint32_t | config_cmds_args[QSPI_PRE_CMD_CNT] | Config commands arguments. |
| uint32_t | cs_hold_time | CS hold time in terms of serial clock.(for example 1 serial clock cyle) |
| uint32_t | cs_setup_time | CS setup time in terms of serial clock.(for example 1 serial clock cyle) |
| uint32_t | data_hold_time | Serial Flash data hold time, valid value: 0/1/2. |
| uint32_t | ddr_mode_enable | Enable DDR mode if set to TRUE. |
| uint32_t | ddrsmp | Select the sampling point for incomming data when serial flash is in DDR mdoe. |
| uint32_t | device_cmd | Command to be tranferred to device. |
| uint32_t | device_mode_config_en | Determine if it is required to config working mode of external spi flash. |
| uint32_t | differential_clock_pin_enable | Differential flash clock pins enable. |
| uint32_t | dqs_enable | Enable DQS mode if set to TRUE. |
| uint32_t | dqs_fa_delay_chain_sel | dqs fa delay chain selection |
| uint32_t | dqs_fb_delay_chain_sel | dqs fb delay chain selection |
| uint32_t | dqs_inverse_sel | Select clock source for internal DQS generation. |
| uint32_t | dqs_latency_enable | DQS Latency Enable. |
| uint32_t | dqs_loopback | Sets DQS LoopBack Mode to enable Dummy Pad MCR[24]. |
| uint32_t | dqs_loopback_internal | 0: dqs loopback from pad, 1: dqs loopback internally |
| uint32_t | dqs_phase_sel | dqs phase sel |
| uint32_t | erase_all_cmd_address_offset | Address for EraseAll command. |
| uint32_t | flash_CK2_clock_pin_enable | Flash CK2 clock pin enable. |
| uint32_t | fsdly | Full speed phase selection for SDR instructions. |
| uint32_t | fsphs | Full speed delay selection for SDR instructions. |
| uint32_t | ips_command_second_divider | second devider for all IPS commands. |
| uint32_t | is_spansion_hyperflash | Determine if connected spi flash device belongs to Hyperflash family. |
| uint32_t | lengthInBytes | Total length of strcut in bytes. |
| uint32_t | look_up_table[QSPI_LUT_MAX_ENTRIES] | Set of seq to perform optimum read on SFLASH as as per vendor SFLASH. |
| uint32_t | need_multi_phases | Determine if multiple hases command are needed. |
| uint32_t | pagesize | page Size of Serial Flash |
| uint32_t | parallel_mode_enable | Enable Individual or parrallel mode. |
| uint32_t | portA_cs1 | Enable PORTA CS1. |
| uint32_t | portB_cs1 | Enable PORTB CS1. |
| uint32_t | pre_erase_cmd_address_offset | Address for PreErase command. |
| uint32_t | pre_program_cmd_address_offset | Address for PreProgram command. |
| uint32_t | pre_read_status_cmd_address_offset | Address for PreReadStatus command. |
| uint32_t | pre_unlock_cmd_address_offset | Address for PreWriteEnable command. |
| uint32_t | reserved0[2] | Reserved for K80. |
| uint32_t | reserved1[2] | reserved |
| uint32_t | reserved2[3] | Reserved words to make sure qspi config block is page-aligend. |
| uint32_t | sclk_freq | In 00 - 24MHz, 01 - 48MHz, 10 - 96MHz,(only for SDR Mode) |
| uint32_t | sectorsize | sector Size of Serial Flash |
| uint32_t | sflash_A1_size | Size of flash connected on QSPI0A Ports and QSPI0A_SS0, in terms of Bytes. |
| uint32_t | sflash_A2_size | Size of flash connected on QSPI0A Ports and QSPI0A_SS1, in terms of Bytes. |
| uint32_t | sflash_B1_size | Size of flash connected on QSPI0B Ports and QSPI0B_SS0, in terms of Bytes. |
| uint32_t | sflash_B2_size | Size of flash connected on QSPI0B Ports and QSPI0B_SS1, in terms of Bytes. |
| uint32_t | sflash_port | 0–Only Port-A, 1–Both PortA and PortB |
| uint32_t | sflash_type | SPI flash type: 0-Single,1–Dual 2–Quad, 3– Octal. |
| uint32_t | tag | Set to magic number of 'kqcf'. |
| uint32_t | timeout_milliseconds |
timeout in terms of millisecond in case of infinite loop in qspi driver 0 represents disabling timeout check. This value is valid since version 1.1.0 |
| uint32_t | unlock_cmd_address_offset | Address for WriteEnable command. |
| standard_version_t | version | version of config struct |
| uint32_t | word_addressable | Determine if the serial flash is word addressable. |
| uint32_t | write_cmd_ipcr | IPCR value of Write command. |
| enum qspi_port_enable_t |
| enum qspiflash_pad_t |
| struct { ... } standard_version_t::B |
| uint32_t { ... } ::bugfix |
bugfix version [7:0]
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::busy_bit_offset |
Flash device busy bit offset in status register.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::column_address_space |
The width of the column address.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::config_cmd_en |
Enable config commands.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::config_cmds[QSPI_PRE_CMD_CNT] |
Config comands, used to configure nor flash.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::config_cmds_args[QSPI_PRE_CMD_CNT] |
Config commands arguments.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::cs_hold_time |
CS hold time in terms of serial clock.(for example 1 serial clock cyle)
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::cs_setup_time |
CS setup time in terms of serial clock.(for example 1 serial clock cyle)
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::data_hold_time |
Serial Flash data hold time, valid value: 0/1/2.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::ddr_mode_enable |
Enable DDR mode if set to TRUE.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::ddrsmp |
Select the sampling point for incomming data when serial flash is in DDR mdoe.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::device_cmd |
Command to be tranferred to device.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::device_mode_config_en |
Determine if it is required to config working mode of external spi flash.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::differential_clock_pin_enable |
Differential flash clock pins enable.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_enable |
Enable DQS mode if set to TRUE.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_fa_delay_chain_sel |
dqs fa delay chain selection
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_fb_delay_chain_sel |
dqs fb delay chain selection
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_inverse_sel |
Select clock source for internal DQS generation.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_latency_enable |
DQS Latency Enable.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_loopback |
Sets DQS LoopBack Mode to enable Dummy Pad MCR[24].
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_loopback_internal |
0: dqs loopback from pad, 1: dqs loopback internally
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::dqs_phase_sel |
dqs phase sel
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::erase_all_cmd_address_offset |
Address for EraseAll command.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::flash_CK2_clock_pin_enable |
Flash CK2 clock pin enable.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::fsdly |
Full speed phase selection for SDR instructions.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::fsphs |
Full speed delay selection for SDR instructions.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::ips_command_second_divider |
second devider for all IPS commands.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::is_spansion_hyperflash |
Determine if connected spi flash device belongs to Hyperflash family.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::lengthInBytes |
Total length of strcut in bytes.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::look_up_table[QSPI_LUT_MAX_ENTRIES] |
Set of seq to perform optimum read on SFLASH as as per vendor SFLASH.
| uint32_t { ... } ::major |
major version [23:16]
| uint32_t { ... } ::minor |
minor version [15:8]
| uint32_t { ... } ::name |
name [31:24]
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::need_multi_phases |
Determine if multiple hases command are needed.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::pagesize |
page Size of Serial Flash
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::parallel_mode_enable |
Enable Individual or parrallel mode.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::portA_cs1 |
Enable PORTA CS1.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::portB_cs1 |
Enable PORTB CS1.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::pre_erase_cmd_address_offset |
Address for PreErase command.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::pre_program_cmd_address_offset |
Address for PreProgram command.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::pre_read_status_cmd_address_offset |
Address for PreReadStatus command.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::pre_unlock_cmd_address_offset |
Address for PreWriteEnable command.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::reserved0[2] |
Reserved for K80.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::reserved1[2] |
reserved
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::reserved2[3] |
Reserved words to make sure qspi config block is page-aligend.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sclk_freq |
In 00 - 24MHz, 01 - 48MHz, 10 - 96MHz,(only for SDR Mode)
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sectorsize |
sector Size of Serial Flash
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_A1_size |
Size of flash connected on QSPI0A Ports and QSPI0A_SS0, in terms of Bytes.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_A2_size |
Size of flash connected on QSPI0A Ports and QSPI0A_SS1, in terms of Bytes.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_B1_size |
Size of flash connected on QSPI0B Ports and QSPI0B_SS0, in terms of Bytes.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_B2_size |
Size of flash connected on QSPI0B Ports and QSPI0B_SS1, in terms of Bytes.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_port |
0–Only Port-A, 1–Both PortA and PortB
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::sflash_type |
SPI flash type: 0-Single,1–Dual 2–Quad, 3– Octal.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::tag |
Set to magic number of 'kqcf'.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::timeout_milliseconds |
timeout in terms of millisecond in case of infinite loop in qspi driver 0 represents disabling timeout check. This value is valid since version 1.1.0
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::unlock_cmd_address_offset |
Address for WriteEnable command.
| uint32_t standard_version_t::version |
combined version numbers
| standard_version_t SFLASH_CONFIGURATION_PARAM_PTR::version |
version of config struct
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::word_addressable |
Determine if the serial flash is word addressable.
| uint32_t SFLASH_CONFIGURATION_PARAM_PTR::write_cmd_ipcr |
IPCR value of Write command.