From a798e61e744b2dc66af6a1a08185747e7fdbf826 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?L=C3=A1szl=C3=B3=20Monda?= Date: Thu, 22 Sep 2016 22:46:45 +0200 Subject: [PATCH] Remove unused VLPR and HSRUN code. --- right/include/board/clock_config.c | 76 +-------------------- right/include/board/clock_config.h | 103 +---------------------------- 2 files changed, 3 insertions(+), 176 deletions(-) diff --git a/right/include/board/clock_config.c b/right/include/board/clock_config.c index 8242211..5824491 100644 --- a/right/include/board/clock_config.c +++ b/right/include/board/clock_config.c @@ -91,7 +91,7 @@ extern uint32_t SystemCoreClock; /*FUNCTION********************************************************************** * * Function Name : CLOCK_CONFIG_SetRtcClock - * Description : This function is used to configuring RTC clock including + * Description : This function is used to configuring RTC clock including * enabling RTC oscillator. * Param capLoad : RTC oscillator capacity load * Param enableOutPeriph : Enable (1U)/Disable (0U) clock to peripherals @@ -196,7 +196,7 @@ void BOARD_BootClockRUN(void) CLOCK_CONFIG_SetRtcClock(RTC_OSC_CAP_LOAD_12PF, RTC_RTC32KCLK_PERIPHERALS_ENABLED); /* Configure the Internal Reference clock (MCGIRCLK). */ CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode, - mcgConfig_BOARD_BootClockRUN.ircs, + mcgConfig_BOARD_BootClockRUN.ircs, mcgConfig_BOARD_BootClockRUN.fcrdiv); /* Configure FLL external reference divider (FRDIV). */ CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); @@ -217,75 +217,3 @@ void BOARD_BootClockRUN(void) /* Set debug trace clock source. */ CLOCK_SetTraceClock(SIM_TRACE_CLK_SEL_CORE_SYSTEM_CLK); } - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ - -/******************************************************************************* - * Variables for BOARD_BootClockVLPR configuration - ******************************************************************************/ -const mcg_config_t mcgConfig_BOARD_BootClockVLPR = - { - .mcgMode = kMCG_ModeBLPI, /* BLPI - Bypassed Low Power Internal */ - .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ - .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */ - .fcrdiv = 0x0U, /* Fast IRC divider: divided by 1 */ - .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */ - .drs = kMCG_DrsLow, /* Low frequency range */ - .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */ - .oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */ - .pll0Config = - { - .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */ - .prdiv = 0x0U, /* PLL Reference divider: divided by 1 */ - .vdiv = 0x0U, /* VCO divider: multiplied by 24 */ - }, - }; -const sim_clock_config_t simConfig_BOARD_BootClockVLPR = - { - .pllFllSel = SIM_PLLFLLSEL_IRC48MCLK_CLK, /* PLLFLL select: IRC48MCLK clock */ - .er32kSrc = SIM_OSC32KSEL_RTC32KCLK_CLK, /* OSC32KSEL select: RTC32KCLK clock (32.768kHz) */ - .clkdiv1 = 0x140000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /2, OUTDIV4: /5 */ - }; -const osc_config_t oscConfig_BOARD_BootClockVLPR = - { - .freq = 0U, /* Oscillator frequency: 0Hz */ - .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */ - .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */ - .oscerConfig = - { - .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */ - .erclkDiv = 0, /* Divider for OSCERCLK: divided by 1 */ - } - }; - -/******************************************************************************* - * Code for BOARD_BootClockVLPR configuration - ******************************************************************************/ -void BOARD_BootClockVLPR(void) -{ - /* Note: This function expects that the SLOW_IRCLK is trimmed to non-default - frequency 0Hz (default frequency: 32768Hz). */ - /* Set the system clock dividers in SIM to safe value. */ - CLOCK_SetSimSafeDivs(); - /* Set MCG to BLPI mode. */ - CLOCK_BootToBlpiMode(mcgConfig_BOARD_BootClockVLPR.fcrdiv, - mcgConfig_BOARD_BootClockVLPR.ircs, - mcgConfig_BOARD_BootClockVLPR.irclkEnableMode); - /* Set the clock configuration in SIM module. */ - CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR); - /* Set VLPR power mode. */ - SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); -#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) - SMC_SetPowerModeVlpr(SMC, false); -#else - SMC_SetPowerModeVlpr(SMC); -#endif - while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr) - { - } - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK; -} - diff --git a/right/include/board/clock_config.h b/right/include/board/clock_config.h index eeff7fe..6e4af45 100644 --- a/right/include/board/clock_config.h +++ b/right/include/board/clock_config.h @@ -31,116 +31,15 @@ #ifndef _CLOCK_CONFIG_H_ #define _CLOCK_CONFIG_H_ #include "fsl_common.h" -/******************************************************************************* - * Definitions - ******************************************************************************/ + #define BOARD_XTAL0_CLK_HZ 8000000U /*!< Board xtal0 frequency in Hz */ #define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board RTC xtal frequency in Hz */ - -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockRUN configuration - ******************************************************************************/ #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 120000000U /*!< Core clock frequency: 120000000Hz */ -/*! @brief MCG set for BOARD_BootClockRUN configuration. - */ extern const mcg_config_t mcgConfig_BOARD_BootClockRUN; -/*! @brief SIM module set for BOARD_BootClockRUN configuration. - */ extern const sim_clock_config_t simConfig_BOARD_BootClockRUN; -/*! @brief OSC set for BOARD_BootClockRUN configuration. - */ extern const osc_config_t oscConfig_BOARD_BootClockRUN; -/******************************************************************************* - * API for BOARD_BootClockRUN configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ void BOARD_BootClockRUN(void); -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK 4000000U /*!< Core clock frequency: 4000000Hz */ - -/*! @brief MCG set for BOARD_BootClockVLPR configuration. - */ -extern const mcg_config_t mcgConfig_BOARD_BootClockVLPR; -/*! @brief SIM module set for BOARD_BootClockVLPR configuration. - */ -extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR; -/*! @brief OSC set for BOARD_BootClockVLPR configuration. - */ -extern const osc_config_t oscConfig_BOARD_BootClockVLPR; - -/******************************************************************************* - * API for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockVLPR(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************* Configuration BOARD_BootClockHSRUN ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKHSRUN_CORE_CLOCK 120000000U /*!< Core clock frequency: 120000000Hz */ - -/*! @brief MCG set for BOARD_BootClockHSRUN configuration. - */ -extern const mcg_config_t mcgConfig_BOARD_BootClockHSRUN; -/*! @brief SIM module set for BOARD_BootClockHSRUN configuration. - */ -extern const sim_clock_config_t simConfig_BOARD_BootClockHSRUN; -/*! @brief OSC set for BOARD_BootClockHSRUN configuration. - */ -extern const osc_config_t oscConfig_BOARD_BootClockHSRUN; - -/******************************************************************************* - * API for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockHSRUN(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - #endif /* _CLOCK_CONFIG_H_ */ -