113 lines
5.3 KiB
C
113 lines
5.3 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// This is the QCB for the case that two MX25U3235F are connected to QuadSPI0A and QuadSPI0B ports.
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// Work under parallel mode
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const qspi_config_t qspi_config_block = {
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.tag = kQspiConfigTag,
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.version = {.version = kQspiVersionTag },
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.lengthInBytes = 512,
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.sflash_A1_size = 0x400000, // 4MB
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.sflash_B1_size = 0x400000, // 4MB
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.sclk_freq = kQspiSerialClockFreq_High, // High frequency
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.sflash_type = kQspiFlashPad_Quad, // SPI Flash devices work under quad-pad mode
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.sflash_port = kQspiPort_EnableBothPorts, // Both QSPI0A and QSPI0B are enabled.
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.busy_bit_offset = 0, // Busy offset is 0
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.ddr_mode_enable = 0, // disable DDR mode
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.dqs_enable = 0, // Disable DQS feature
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.parallel_mode_enable = 1, // QuadSPI module work under parallel mode
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.pagesize = 512, // Page Size : 256 *2 = 512 bytes
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.sectorsize = 0x2000, // Sector Size: 4KB * 2 = 8KB
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.device_mode_config_en = 1, // configure quad mode for spi flash
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.device_cmd = 0x40, // Enable quad mode
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.write_cmd_ipcr = 0x05000000U, // IPCR indicating enable seqid (5<<24)
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.ips_command_second_divider = 3, // Set second divider for QSPI serial clock to 3
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.look_up_table =
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{
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// Seq0 : Quad Read (maximum supported freq: 104MHz)
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/*
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CMD: 0xEB - Quad Read, Single pad
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ADDR: 0x18 - 24bit address, Quad pads
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DUMMY: 0x06 - 6 clock cycles, Quad pads
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READ: 0x80 - Read 128 bytes, Quad pads
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JUMP_ON_CS: 0
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*/
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[0] = 0x0A1804EB, [1] = 0x1E800E06, [2] = 0x2400,
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// Seq1: Write Enable (maximum supported freq: 104MHz)
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/*
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CMD: 0x06 - Write Enable, Single pad
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*/
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[4] = 0x406,
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// Seq2: Erase All (maximum supported freq: 104MHz)
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/*
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CMD: 0x60 - Erase All chip, Single pad
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*/
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[8] = 0x460,
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// Seq3: Read Status (maximum supported freq: 104MHz)
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/*
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CMD: 0x05 - Read Status, single pad
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READ: 0x01 - Read 1 byte
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*/
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[12] = 0x1c010405,
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// Seq4: Page Program (maximum supported freq: 104MHz)
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/*
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CMD: 0x02 - Page Program, Single pad
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ADDR: 0x18 - 24bit address, Single pad
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WRITE: 0x40 - Write 64 bytes at one pass, Single pad
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(0x40 is ignored, as it will be overwritten by page size)
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*/
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[16] = 0x08180402, [17] = 0x2040,
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// Seq5: Write status register to enable quad mode
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/*
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CMD: 0x01 - Write Status Register, single pad
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WRITE: 0x01 - Write 1 byte of data, single pad
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*/
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[20] = 0x20010401,
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// Seq7: Erase Sector
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/*
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CMD: 0x20 - Sector Erase, single pad
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ADDR: 0x18 - 24 bit address, single pad
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*/
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[28] = 0x08180420,
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// Seq8: Dummy
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/*
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CMD: 0 - Dummy command, used to force SPI flash to exit continuous read mode.
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unecessary here because the continous read mode isn't enabled.
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*/
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[32] = 0,
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},
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}; |