128 lines
6.0 KiB
C
128 lines
6.0 KiB
C
/*
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* Copyright (c) 2014, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_device_registers.h"
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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//! peripheral enable configurations
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#define BL_ENABLE_PINMUX_UART0 (BL_CONFIG_LPUART_0)
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#define BL_ENABLE_PINMUX_UART1 (BL_CONFIG_LPUART_1)
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#define BL_ENABLE_PINMUX_UART2 (BL_CONFIG_LPUART_2)
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#define BL_ENABLE_PINMUX_UART4 (BL_CONFIG_LPUART_4)
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#define BL_ENABLE_PINMUX_SPI0 (BL_CONFIG_DSPI_0)
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#define BL_ENABLE_PINMUX_SPI1 (BL_CONFIG_DSPI_1)
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#define BL_ENABLE_PINMUX_I2C0 (BL_CONFIG_I2C_0)
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#define BL_ENABLE_PINMUX_I2C1 (BL_CONFIG_I2C_1)
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//! UART pinmux configurations
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#define UART0_RX_PORT_BASE PORTB
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#define UART0_RX_GPIO_BASE GPIOB
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#define UART0_RX_GPIO_PIN_NUM 16 // PTB16
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#define UART0_RX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART0 RX
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#define UART0_RX_GPIO_ALT_MODE kPORT_MuxAsGpio // ALT mdoe for GPIO
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#define UART0_RX_GPIO_IRQn PORTB_IRQn
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#define UART0_RX_GPIO_IRQHandler PORTB_IRQHandler
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#define UART0_TX_PORT_BASE PORTB
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#define UART0_TX_GPIO_PIN_NUM 17 // PTB17
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#define UART0_TX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART0 TX
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#define UART1_RX_PORT_BASE PORTC
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#define UART1_RX_GPIO_BASE GPIOC
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#define UART1_RX_GPIO_PIN_NUM 3 // PTC3
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#define UART1_RX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART1 RX
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#define UART1_RX_GPIO_ALT_MODE kPORT_MuxAsGpio // ALT mdoe for GPIO
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#define UART1_RX_GPIO_IRQn PORTC_IRQn
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#define UART1_RX_GPIO_IRQHandler PORTC_IRQHandler
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#define UART1_TX_PORT_BASE PORTC
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#define UART1_TX_GPIO_PIN_NUM 4 // PTC4
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#define UART1_TX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART1 TX
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#define UART2_RX_PORT_BASE PORTD
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#define UART2_RX_GPIO_BASE GPIOD
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#define UART2_RX_GPIO_PIN_NUM 2 // PTD2
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#define UART2_RX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART2 RX
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#define UART2_RX_GPIO_ALT_MODE kPORT_MuxAsGpio // ALT mdoe for GPIO
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#define UART2_RX_GPIO_IRQn PORTD_IRQn
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#define UART2_RX_GPIO_IRQHandler PORTD_IRQHandler
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#define UART2_TX_PORT_BASE PORTD
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#define UART2_TX_GPIO_PIN_NUM 3 // PTD3
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#define UART2_TX_FUNC_ALT_MODE kPORT_MuxAlt3 // ALT mode for UART2 TX
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//! I2C pinmux configurations - ROM I2C0
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#define I2C0_SCL_PORT_BASE PORTB
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#define I2C0_SCL_GPIO_PIN_NUM 2 // PTB2
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#define I2C0_SCL_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for I2C0 SCL
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#define I2C0_SDA_PORT_BASE PORTB
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#define I2C0_SDA_GPIO_PIN_NUM 3 // PTB3
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#define I2C0_SDA_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for I2C0 SDA
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//! I2C pinmux configurations - ROM I2C1
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#define I2C1_SCL_PORT_BASE PORTC
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#define I2C1_SCL_GPIO_PIN_NUM 10 // PTC10
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#define I2C1_SCL_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for I2C1 SCL
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#define I2C1_SDA_PORT_BASE PORTC
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#define I2C1_SDA_GPIO_PIN_NUM 11 // PTC11
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#define I2C1_SDA_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for I2C1 SDA
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//! SPI pinmux configurations - ROM SPI0
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#define SPI0_PCS_PORT_BASE PORTA
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#define SPI0_PCS_GPIO_PIN_NUM 14 // PTA14
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#define SPI0_PCS_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for SPI0 PCS
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#define SPI0_SCK_PORT_BASE PORTA
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#define SPI0_SCK_GPIO_PIN_NUM 15 // PTA15
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#define SPI0_SCK_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for SPI0 SCK
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#define SPI0_SOUT_PORT_BASE PORTA
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#define SPI0_SOUT_GPIO_PIN_NUM 16 // PTA16
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#define SPI0_SOUT_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for SPI0 SOUT
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#define SPI0_SIN_PORT_BASE PORTA
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#define SPI0_SIN_GPIO_PIN_NUM 17 // PTA17
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#define SPI0_SIN_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for SPI0 SIN
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//! SPI pinmux configurations - ROM SPI1
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#define SPI1_PCS_PORT_BASE PORTD
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#define SPI1_PCS_GPIO_PIN_NUM 4 // PTD4
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#define SPI1_PCS_FUNC_ALT_MODE kPORT_MuxAlt7 // ALT mode for SPI1 PCS
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#define SPI1_SCK_PORT_BASE PORTD
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#define SPI1_SCK_GPIO_PIN_NUM 5 // PTD5
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#define SPI1_SCK_FUNC_ALT_MODE kPORT_MuxAlt7 // ALT mode for SPI1 SCK
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#define SPI1_SOUT_PORT_BASE PORTD
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#define SPI1_SOUT_GPIO_PIN_NUM 6 // PTD6
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#define SPI1_SOUT_FUNC_ALT_MODE kPORT_MuxAlt7 // ALT mode for SPI1 SOUT
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#define SPI1_SIN_PORT_BASE PORTD
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#define SPI1_SIN_GPIO_PIN_NUM 7 // PTD7
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#define SPI1_SIN_FUNC_ALT_MODE kPORT_MuxAlt7 // ALT mode for SPI1 SIN
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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