88 lines
4.1 KiB
C
88 lines
4.1 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_device_registers.h"
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#include "port/fsl_port.h"
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#include "pin_mux.h"
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*!
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* @brief Initialize all pins used in this example
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*
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* @param disablePortClockAfterInit disable port clock after pin
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* initialization or not.
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*/
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void BOARD_InitPins(void)
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{
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port_pin_config_t pinConfig;
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pinConfig.pullSelect = kPORT_PullUp;
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pinConfig.openDrainEnable = kPORT_OpenDrainEnable;
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/* Ungate the port clock */
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SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK |
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SIM_SCGC5_PORTE_MASK);
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/* Initialize UART2(OpenSDA) pins below */
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PORT_SetPinMux(PORTE, 16u, kPORT_MuxAlt3); /* Affects PORTE_PCR16 register */
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PORT_SetPinMux(PORTE, 17u, kPORT_MuxAlt3); /* Affects PORTE_PCR17 register */
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/* Enable pins for UART4 on PTE24 - PTE25. */
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PORT_SetPinMux(PORTE, 25u, kPORT_MuxAlt3); /* UART4_RX is ALT3 for pin PTE25 */
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PORT_SetPinMux(PORTE, 24u, kPORT_MuxAlt3); /* UART4_TX is ALT3 for pin PTE24 */
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/* Enable pins for I2C0 on PTE18 - PTE19. */
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PORT_SetPinConfig(PORTE, 18u, &pinConfig); /* I2C0_SCL set for open drain */
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PORT_SetPinConfig(PORTE, 19u, &pinConfig); /* I2C0_SDA set for open drain */
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PORT_SetPinMux(PORTE, 18u, kPORT_MuxAlt4); /* I2C0_SCL is ALT4 for pin PTE18 */
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PORT_SetPinMux(PORTE, 19u, kPORT_MuxAlt4); /* I2C0_SDA is ALT4 for pin PTE19 */
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/* Enable pins for SPI0 on PTD0 - PTD3. */
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PORT_SetPinMux(PORTD, 11u, kPORT_MuxAlt2); /* SPI0_PCS0 is ALT2 for pin PTD11 */
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PORT_SetPinMux(PORTD, 12u, kPORT_MuxAlt2); /* SPI0_SCK is ALT2 for pin PTD12 */
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PORT_SetPinMux(PORTD, 13u, kPORT_MuxAlt2); /* SPI0_SOUT is ALT2 for pin PTD13 */
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PORT_SetPinMux(PORTD, 14u, kPORT_MuxAlt2); /* SPI0_SIN is ALT2 for pin PTD14 */
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/* LED PTA28 */
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PORT_SetPinMux(PORTA, 28u, kPORT_MuxAsGpio);
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PORT_SetPinMux(PORTA, 29u, kPORT_MuxAsGpio);
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PORT_SetPinMux(PORTB, 4u, kPORT_MuxAsGpio);
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PORT_SetPinMux(PORTB, 5u, kPORT_MuxAsGpio);
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/* SW2 PTA4 */
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PORT_SetPinMux(PORTA, 4u, kPORT_MuxAsGpio);
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/* SW3 PTA10 */
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PORT_SetPinMux(PORTA, 10u, kPORT_MuxAsGpio);
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/* Enable pins for FLEXCAN0 on PTA30 - PTA31. */
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PORT_SetPinMux(PORTA, 30u, kPORT_MuxAlt2); /* FLEXCAN0_TX is ALT2 for pin PTA30 */
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PORT_SetPinMux(PORTA, 31u, kPORT_MuxAlt2); /* FLEXCAN0_RX is ALT2 for pin PTA31 */
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} |