99 lines
3.9 KiB
C
99 lines
3.9 KiB
C
/*
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* Copyright (c) 2013-2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "application_common.h"
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#include "fsl_device_registers.h"
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#include "lpuart/fsl_lpuart.h"
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#include "target_config.h"
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#include <assert.h>
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#include <stdio.h>
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// Variables
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// Code
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////////////////////////////////////////////////////////////////////////////////
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void init_hardware(void)
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{
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// Enable clocks to ports.
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SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK);
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// Select the MCGIRCLK as UART0 clock source.
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SIM->SOPT2 |= SIM_SOPT2_LPUART0SRC_MASK;
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// Update SystemCoreClock. Out of reset, the LIRC is enabled. FOPT bits set the OUTDIV1 value.
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uint32_t lirc = (((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT) == 1) ? kLIRC8M : kLIRC2M;
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SystemCoreClock = lirc / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT) + 1);
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}
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uint32_t get_uart_clock(uint32_t instance)
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{
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uint32_t lirc = (((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT) == 1) ? kLIRC8M : kLIRC2M;
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return lirc >> ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
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}
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void init_term_uart(void)
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{
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// Init pin mux for term uart.
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PORTB->PCR[2] = PORT_PCR_MUX(2); // UART0_RX is ALT2 for pin PTB2
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PORTB->PCR[1] = PORT_PCR_MUX(2); // UART0_TX is ALT2 for pin PTB1
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// Ungate the LPUART clock.
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SIM->SCGC5 |= SIM_SCGC5_LPUART0_MASK;
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lpuart_config_t lpuartCfg;
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LPUART_GetDefaultConfig(&lpuartCfg);
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lpuartCfg.baudRate_Bps = TERMINAL_BAUD;
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lpuartCfg.enableTx = true;
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lpuartCfg.parityMode = kLPUART_ParityDisabled;
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lpuartCfg.stopBitCount = kLPUART_OneStopBit;
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LPUART_Init(LPUART0, &lpuartCfg, get_uart_clock(0));
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}
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int fputc(int ch, FILE *fp)
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{
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LPUART_WriteBlocking(LPUART0, (const uint8_t *)&ch, 1);
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return ch;
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}
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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