188 lines
6.2 KiB
C
188 lines
6.2 KiB
C
/*
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* Copyright (c) 2013-2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bootloader_common.h"
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#include "bootloader/bl_context.h"
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#include "fsl_device_registers.h"
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#include "uart/fsl_uart.h"
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#include "utilities/kinetis_family.h"
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#include "smc/smc.h"
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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#ifdef TOWER
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#define BOOT_PIN_NUMBER 7
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#define BOOT_PIN_PORT PORTC
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#define BOOT_PIN_GPIO GPIOC
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#define BOOT_PIN_ALT_MODE 1
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#endif
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#ifdef FREEDOM
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#define BOOT_PIN_NUMBER 17
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#define BOOT_PIN_PORT PORTB
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#define BOOT_PIN_GPIO GPIOB
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#define BOOT_PIN_ALT_MODE 1
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#endif
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#define BOOT_PIN_DEBOUNCE_READ_COUNT 500
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////////////////////////////////////////////////////////////////////////////////
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// Variables
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// Code
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////////////////////////////////////////////////////////////////////////////////
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void init_hardware(void)
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{
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exit_vlpr();
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// Enable all the ports
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SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK |
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SIM_SCGC5_PORTE_MASK);
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SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; // set PLLFLLSEL to select the IRC48M for this clock source
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}
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void deinit_hardware(void)
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{
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SIM->SCGC5 &= (uint32_t) ~(SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK |
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SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK);
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// Restore SIM_SOPTx related bits being changed
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SIM->SOPT2 &= (uint32_t) ~(SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
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}
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// Note: Keep this function here to ensure compatibility, all usb related clock
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// configuration is maintained by USB stack itself.
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bool usb_clock_init(void)
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{
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// Enable USB-OTG IP clocking
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SIM->SCGC4 |= (SIM_SCGC4_USBOTG_MASK);
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// If clock of usb module cannot be enabled, return false
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if (!(SIM->SCGC4 & SIM_SCGC4_USBOTG_MASK))
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{
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return false;
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}
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// Reset the USB peripheral, this must be done here instead of USB driver due to silicon errata
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// for at least KL25 and K22
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USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
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while (USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK)
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;
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// Select IRC48M clock, SIM_SOPT2_USBSRC_MASK selects internal clock,
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// 0x30000 = SIM_SOPT2_PLLFLLSEL_MASK, selects IRC48MHz clock
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SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
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// need to set the clock_recover_en and irc_en register
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USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
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USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
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return true;
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}
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uint32_t get_bus_clock(void)
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{
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uint32_t busClockDivider = ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1;
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return (SystemCoreClock / busClockDivider);
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}
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uint32_t get_uart_clock(uint32_t instance)
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{
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switch (instance)
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{
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case 0:
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case 1:
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// UART0 and UART1 always use the system clock
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return SystemCoreClock;
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case 2:
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case 3:
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case 4:
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case 5:
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default:
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return 0;
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}
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}
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bool is_boot_pin_asserted(void)
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{
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return false;
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#ifdef BL_TARGET_FLASH
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// Initialize boot pin for GPIO
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BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= PORT_PCR_MUX(BOOT_PIN_ALT_MODE);
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// Set boot pin as an input
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BOOT_PIN_GPIO->PDDR &= (uint32_t) ~(1 << BOOT_PIN_NUMBER);
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// Set boot pin pullup enabled, pullup select, filter enable
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BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK | PORT_PCR_PFE_MASK);
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uint32_t readCount = 0;
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// Sample the pin a number of times
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for (uint32_t i = 0; i < BOOT_PIN_DEBOUNCE_READ_COUNT; i++)
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{
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readCount += ((BOOT_PIN_GPIO->PDIR) >> BOOT_PIN_NUMBER) & 1;
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}
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// boot pin is pulled high so we are measuring lows, make sure most of our measurements
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// registered as low
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return (readCount < (BOOT_PIN_DEBOUNCE_READ_COUNT / 2));
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#else
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// Boot pin for Flash only target
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return false;
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#endif
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}
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void debug_init(void)
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{
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}
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#if __ICCARM__
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size_t __write(int handle, const unsigned char *buf, size_t size)
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{
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return size;
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}
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#endif // __ICCARM__
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void update_available_peripherals()
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{
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}
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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