qspi.h

/*
 * Copyright (c) 2013-2016, Freescale Semiconductor, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * o Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * o Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __QSPI_H__
#define __QSPI_H__

#include "memory/memory.h"
#include "bootloader_common.h"

// Definitions
#define QSPI_LUT_MAX_ENTRIES 64
#define QSPI_PRE_CMD_CNT 4 
#define QSPI_FEATURE_ENABLE 1

#define QSPI_VERSION_NAME 'Q'

enum __qspi_config_block_tags
{
    kQspiConfigTag = FOUR_CHAR_CODE('k', 'q', 'c', 'f'),
    kQspiVersionTag = FOUR_CHAR_CODE(0, 2, 1, 'Q'),
};

typedef enum _qspiflash_mode_option
{
    kQspiFlashMode_Serial = 0,  
    kQspiFlashMode_Parallel = 1 
} qspiflash_mode_option_t;

typedef enum _qspiflash_pad
{
    kQspiFlashPad_Single = 0, 
    kQspiFlashPad_Dual = 1,   
    kQspiFlashPad_Quad = 2,   
    kQspiFlashPad_Octal = 3   
} qspiflash_pad_t;

typedef enum _qspi_serial_clock_freq
{
    kQspiSerialClockFreq_Low = 0, 
    kQspiSerialClockFreq_Mid = 1, 
    kQspiSerialClockFreq_High = 2 
} qspi_serial_clock_freq_t;

typedef enum _qspiflash_property
{
    kQspiFlashProperty_InitStatus = 0,
    kQspiFlaghProperty_StartAddress = 1,           
    kQspiFlashProperty_TotalFlashSizeInKBytes = 2, 
    kQspiFlashProperty_PageSize = 3,               
    kQspiFlashProperty_SectorSize = 4,             
    kQspiFlashProperty_BlockSize = 5,              

    kQspiFlashProperty_TotalFlashSize = 0x10, 
} qspiflash_property_t;

typedef enum _qspi_endianness
{
    kQspiEndianess_64BE = 0U, 
    kQspiEndianess_32LE = 1U, 
    kQspiEndianess_32BE = 2U, 
    kQspiEndianess_64LE = 3U, 
} qspi_endianess_t;

typedef enum _qspi_port_enable
{
    kQspiPort_EnablePortA = 0U,    
    kQspiPort_EnableBothPorts = 1, 
} qspi_port_enable_t;

typedef enum _qspi_ahb_data_transfer_size
{
    kQspiAHBDataTransferSize_64Bytes = 8U,   
    kQspiAHBDataTransferSize_256Bytes = 32U, 
    kQspiAHBDataTransferSize_512Bytes = 64U, 
} qspi_ahb_data_transfer_size_t;

typedef enum _qspiflash_status
{
    kStatus_QspiFlashSizeError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 0),
    kStatus_QspiFlashAlignmentError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 1),
    kStatus_QspiFlashAddressError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 2),
    kStatus_QspiFlashCommandFailure = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 3),
    kStatus_QspiFlashUnknownProperty = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 4),
    kStatus_QspiNotConfigured = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 5),
    kStatus_QspiCommandNotSupported = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 6),
    kStatus_QspiCommandTimeout = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 7),

    kStatus_QspiWriteFailure = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 8),

    //        commands in LUT
    kStatusQspiModuleBusy = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 9),
} qspiflash_status_t;

typedef struct __sflash_configuration_parameter
{
    uint32_t tag;               
    standard_version_t version; 
    uint32_t lengthInBytes;     

    uint32_t dqs_loopback;          
    uint32_t data_hold_time;        
    uint32_t reserved0[2];          
    uint32_t device_mode_config_en; 
    uint32_t device_cmd;            
    uint32_t write_cmd_ipcr;        
    uint32_t word_addressable;      

    uint32_t cs_hold_time;         
    uint32_t cs_setup_time;        
    uint32_t sflash_A1_size;       
    uint32_t sflash_A2_size;       
    uint32_t sflash_B1_size;       
    uint32_t sflash_B2_size;       
    uint32_t sclk_freq;            
    uint32_t busy_bit_offset;      
    uint32_t sflash_type;          
    uint32_t sflash_port;          
    uint32_t ddr_mode_enable;      
    uint32_t dqs_enable;           
    uint32_t parallel_mode_enable; 
    uint32_t portA_cs1;            
    uint32_t portB_cs1;            
    uint32_t fsphs;                
    uint32_t fsdly;                
    uint32_t ddrsmp;               
    uint32_t
        look_up_table[QSPI_LUT_MAX_ENTRIES]; 
    uint32_t column_address_space;           
    uint32_t config_cmd_en;                  
    uint32_t config_cmds[QSPI_PRE_CMD_CNT];  
    uint32_t config_cmds_args[QSPI_PRE_CMD_CNT]; 
    uint32_t differential_clock_pin_enable;      
    uint32_t flash_CK2_clock_pin_enable;         
    uint32_t dqs_inverse_sel;                    
    uint32_t dqs_latency_enable;                 
    uint32_t dqs_loopback_internal;              
    uint32_t dqs_phase_sel;                      
    uint32_t dqs_fa_delay_chain_sel;             
    uint32_t dqs_fb_delay_chain_sel;             
    uint32_t reserved1[2];                       
    uint32_t pagesize;                           
    uint32_t sectorsize;                         

    uint32_t timeout_milliseconds; 
    uint32_t ips_command_second_divider; 
    uint32_t need_multi_phases;          
    uint32_t is_spansion_hyperflash;     
    uint32_t pre_read_status_cmd_address_offset; 
    uint32_t pre_unlock_cmd_address_offset;      
    uint32_t unlock_cmd_address_offset;          
    uint32_t pre_program_cmd_address_offset;     
    uint32_t pre_erase_cmd_address_offset;       
    uint32_t erase_all_cmd_address_offset;       
    uint32_t reserved2[3];                       

} qspi_config_t, *SFLASH_CONFIGURATION_PARAM_PTR;

// API

#if defined(__cplusplus)
extern "C" {
#endif

status_t quadspi_get_property(uint32_t whichProperty, uint32_t *value);

status_t quadspi_page_program(uint32_t dst_addr, const uint32_t *src, uint32_t lengthInBytes);

status_t quadspi_init(qspi_config_t *config_base);

bool is_quadspi_configured(void);

extern status_t quadspi_iomux_configuration(qspi_config_t *config_base);

extern void quadspi_serial_clock_configure(qspi_serial_clock_freq_t freq);

status_t quadspi_erase_all(void);

status_t quadspi_erase_sector(uint32_t address);

status_t quadspi_cache_clear(void);

#if defined(__cplusplus)
}

#endif // #ifndef __QSPI_H__

#endif

// EOF