Add KBOOT.
This commit is contained in:
László Monda
@@ -0,0 +1,122 @@
|
||||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MK65FN2M0CAC18
|
||||
** MK65FN2M0VMI18
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
|
||||
** Version: rev. 2.2, 2014-10-14
|
||||
** Build: b141113
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright (c) 2014 Freescale Semiconductor, Inc.
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.freescale.com
|
||||
** mail: support@freescale.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
#define __ram_vector_table_size__ 0x00000400
|
||||
#else
|
||||
#define __ram_vector_table_size__ 0x00000000
|
||||
#endif
|
||||
|
||||
#define m_interrupts_start 0x00000000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_flash_config_start 0x00000400
|
||||
#define m_flash_config_size 0x00000010
|
||||
|
||||
#define m_text_start 0x00000410
|
||||
#define m_text_size 0x001FFBF0
|
||||
|
||||
#define m_interrupts_ram_start 0x1FFF0000
|
||||
#define m_interrupts_ram_size __ram_vector_table_size__
|
||||
|
||||
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
|
||||
#define m_data_size (0x00010000 - m_interrupts_ram_size)
|
||||
|
||||
#define m_data_2_start 0x20000000
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||||
#define m_data_2_size 0x00030000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x1000
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0000
|
||||
#endif
|
||||
|
||||
LR_m_text m_text_start m_text_size { ; load region size_region
|
||||
ER_m_text m_text_start m_text_size { ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
|
||||
.ANY (+RW +ZI)
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||||
}
|
||||
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
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||||
}
|
||||
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_interrupts m_interrupts_start m_interrupts_size {
|
||||
#if (!defined(__ram_vector_table__))
|
||||
VECTOR_RAM m_interrupts_start EMPTY 0 {
|
||||
}
|
||||
#endif
|
||||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
* (RESET,+FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_flash_config m_flash_config_start m_flash_config_size {
|
||||
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
|
||||
* (FlashConfig)
|
||||
}
|
||||
}
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
|
||||
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,125 @@
|
||||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MK65FN2M0CAC18
|
||||
** MK65FN2M0VMI18
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
|
||||
** Version: rev. 2.2, 2014-10-14
|
||||
** Build: b141113
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright (c) 2014 Freescale Semiconductor, Inc.
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.freescale.com
|
||||
** mail: support@freescale.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
#define __ram_vector_table_size__ 0x00000400
|
||||
#else
|
||||
#define __ram_vector_table_size__ 0x00000000
|
||||
#endif
|
||||
|
||||
#define m_interrupts_start 0x0000a000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_flash_config_start 0x0000a400
|
||||
#define m_flash_config_size 0x00000010
|
||||
|
||||
#define m_text_start 0x0000a410
|
||||
#define m_text_size 0x001FFBF0
|
||||
|
||||
#define m_interrupts_ram_start 0x1FFF0000
|
||||
#define m_interrupts_ram_size __ram_vector_table_size__
|
||||
|
||||
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
|
||||
#define m_data_size (0x00010000 - m_interrupts_ram_size)
|
||||
|
||||
#define m_data_2_start 0x20000000
|
||||
#define m_data_2_size 0x00030000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x0400
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
LR_m_text m_text_start m_text_size { ; load region size_region
|
||||
ER_m_text m_text_start m_text_size { ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_m_data m_data_start m_data_size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
|
||||
}
|
||||
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_interrupts m_interrupts_start m_interrupts_size {
|
||||
#if (!defined(__ram_vector_table__))
|
||||
VECTOR_RAM m_interrupts_start EMPTY 0 {
|
||||
}
|
||||
#endif
|
||||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
* (RESET,+FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_flash_config m_flash_config_start m_flash_config_size {
|
||||
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
|
||||
* (FlashConfig)
|
||||
}
|
||||
}
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
|
||||
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,125 @@
|
||||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MK65FN2M0CAC18
|
||||
** MK65FN2M0VMI18
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
|
||||
** Version: rev. 2.2, 2014-10-14
|
||||
** Build: b141113
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright (c) 2014 Freescale Semiconductor, Inc.
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.freescale.com
|
||||
** mail: support@freescale.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
#define __ram_vector_table_size__ 0x00000400
|
||||
#else
|
||||
#define __ram_vector_table_size__ 0x00000000
|
||||
#endif
|
||||
|
||||
#define m_interrupts_start 0x00000000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_flash_config_start 0x00000400
|
||||
#define m_flash_config_size 0x00000010
|
||||
|
||||
#define m_text_start 0x00000410
|
||||
#define m_text_size 0x001FFBF0
|
||||
|
||||
#define m_interrupts_ram_start 0x1FFF0000
|
||||
#define m_interrupts_ram_size __ram_vector_table_size__
|
||||
|
||||
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
|
||||
#define m_data_size (0x00010000 - m_interrupts_ram_size)
|
||||
|
||||
#define m_data_2_start 0x20000000
|
||||
#define m_data_2_size 0x00030000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x0400
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
LR_m_text m_text_start m_text_size { ; load region size_region
|
||||
ER_m_text m_text_start m_text_size { ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_m_data m_data_start m_data_size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
|
||||
}
|
||||
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_interrupts m_interrupts_start m_interrupts_size {
|
||||
#if (!defined(__ram_vector_table__))
|
||||
VECTOR_RAM m_interrupts_start EMPTY 0 {
|
||||
}
|
||||
#endif
|
||||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
* (RESET,+FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_flash_config m_flash_config_start m_flash_config_size {
|
||||
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
|
||||
* (FlashConfig)
|
||||
}
|
||||
}
|
||||
|
||||
#if (defined(__ram_vector_table__))
|
||||
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
|
||||
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,91 @@
|
||||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MK65FN2M0CAC18
|
||||
** MK65FN2M0VMI18
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
|
||||
** Version: rev. 2.2, 2014-10-14
|
||||
** Build: b141113
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright (c) 2014 Freescale Semiconductor, Inc.
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.freescale.com
|
||||
** mail: support@freescale.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#define m_interrupts_start 0x1FFF0000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_text_start 0x1FFF0400
|
||||
#define m_text_size 0x0000FC00
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x1000
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0000
|
||||
#endif
|
||||
|
||||
LR_m_text m_text_start m_text_size { ; load region size_region
|
||||
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
|
||||
}
|
||||
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_interrupts m_interrupts_start m_interrupts_size {
|
||||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
* (RESET,+FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
|
||||
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
.ANY (.m_interrupts_ram)
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user