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This commit is contained in:
László Monda
2016-08-10 01:45:15 +02:00
commit e6c1fce5b4
9392 changed files with 3751375 additions and 0 deletions
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123
targets/common/linker/arm/MK02F12810/MK02F128xxx10_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

126
targets/common/linker/arm/MK02F12810/MK02F128xxx10_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

126
targets/common/linker/arm/MK02F12810/MK02F128xxx10_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0200
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

100
targets/common/linker/arm/MK02F12810/MK02F128xxx10_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150602
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFE000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFE400
#define m_text_size 0x00005000
/******************************************************************************************
** Comments:
** The real m_text_size should be 0x00003C00. But it seems Keil cross-module optimization
** does not allow the size exceed the limit before optimization (a bug?) so we have to
** use this method to overcome this issue. Please check map file to make sure the final
** code size will not exceed 16K bytes.
******************************************************************************************/
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

124
targets/common/linker/arm/MK22F12810/MK22FN128xxx10_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN128VDC10
** MK22FN128VLH10
** MK22FN128VLL10
** MK22FN128VMP10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

127
targets/common/linker/arm/MK22F12810/MK22FN128xxx10_application_0xa000.scf Normal file
View File

@@ -0,0 +1,127 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK22FN128VDC10
** MK22FN128VLH10
** MK22FN128VLL10
** MK22FN128VMP10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

127
targets/common/linker/arm/MK22F12810/MK22FN128xxx10_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN128VDC10
** MK22FN128VLH10
** MK22FN128VLL10
** MK22FN128VMP10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

93
targets/common/linker/arm/MK22F12810/MK22FN128xxx10_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN128VDC10
** MK22FN128VLH10
** MK22FN128VLL10
** MK22FN128VMP10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFE000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFE400
#define m_text_size 0x00005C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0100
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

125
targets/common/linker/arm/MK22F25612/MK22FN256xxx12_application_0x0000.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MK22F25612/MK22FN256xxx12_application_0xa000.scf Normal file
View File

@@ -0,0 +1,128 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MK22F25612/MK22FN256xxx12_flashloader_loader.scf Normal file
View File

@@ -0,0 +1,128 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

94
targets/common/linker/arm/MK22F25612/MK22FN256xxx12_ram_flashloader.scf Normal file
View File

@@ -0,0 +1,94 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFC000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFC400
#define m_text_size 0x0000BC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

125
targets/common/linker/arm/MK22F51212/MK22FN512xxx12_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN512CAP12
** MK22FN512VDC12
** MK22FN512VLH12
** MK22FN512VLL12
** MK22FN512VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 2.7, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MK22F51212/MK22FN512xxx12_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN512CAP12
** MK22FN512VDC12
** MK22FN512VLH12
** MK22FN512VLL12
** MK22FN512VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 2.7, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__stack_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MK22F51212/MK22FN512xxx12_flashloader_loader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN512CAP12
** MK22FN512VDC12
** MK22FN512VLH12
** MK22FN512VLL12
** MK22FN512VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 2.7, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__stack_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

94
targets/common/linker/arm/MK22F51212/MK22FN512xxx12_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN512CAP12
** MK22FN512VDC12
** MK22FN512VLH12
** MK22FN512VLL12
** MK22FN512VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 2.7, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0001FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

120
targets/common/linker/arm/MK24F25612/MK24FN256xxx12_application_0x0000.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processor: MK24FN256VDC12
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K24P121M120SF5RM, Rev. 2, May 2014
** Version: rev. 1.4, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

123
targets/common/linker/arm/MK24F25612/MK24FN256xxx12_application_0xa000.scf Normal file
View File

@@ -0,0 +1,123 @@
#! armcc -E
/*
** ###################################################################
** Processor: MK24FN256VDC12
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K24P121M120SF5RM, Rev. 2, May 2014
** Version: rev. 1.4, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

123
targets/common/linker/arm/MK24F25612/MK24FN256xxx12_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processor: MK24FN256VDC12
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K24P121M120SF5RM, Rev. 2, May 2014
** Version: rev. 1.4, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

89
targets/common/linker/arm/MK24F25612/MK24FN256xxx12_ram_flashloader.scf Normal file
View File

@@ -0,0 +1,89 @@
#! armcc -E
/*
** ###################################################################
** Processor: MK24FN256VDC12
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K24P121M120SF5RM, Rev. 2, May 2014
** Version: rev. 1.4, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0003FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

124
targets/common/linker/arm/MK64F12/MK64FN1M0xxx12_application_0x0000.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK64FN1M0VDC12
** MK64FN1M0VLL12
** MK64FN1M0VLQ12
** MK64FN1M0VMD12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
** Version: rev. 2.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

127
targets/common/linker/arm/MK64F12/MK64FN1M0xxx12_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK64FN1M0VDC12
** MK64FN1M0VLL12
** MK64FN1M0VLQ12
** MK64FN1M0VMD12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
** Version: rev. 2.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

127
targets/common/linker/arm/MK64F12/MK64FN1M0xxx12_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK64FN1M0VDC12
** MK64FN1M0VLL12
** MK64FN1M0VLQ12
** MK64FN1M0VMD12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
** Version: rev. 2.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

93
targets/common/linker/arm/MK64F12/MK64FN1M0xxx12_ram_flashloader.scf Normal file
View File

@@ -0,0 +1,93 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK64FN1M0VDC12
** MK64FN1M0VLL12
** MK64FN1M0VLQ12
** MK64FN1M0VMD12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
** Version: rev. 2.8, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0003FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MK65F18/MK65FN2M0xxx18_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MK65F18/MK65FN2M0xxx18_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MK65F18/MK65FN2M0xxx18_flashloader_loader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MK65F18/MK65FN2M0xxx18_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0000FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MK66F18/MK66FN2M0xxx18_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MK66F18/MK66FN2M0xxx18_application_0xa000.scf Normal file
View File

@@ -0,0 +1,125 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MK66F18/MK66FN2M0xxx18_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x001FFBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MK66F18/MK66FN2M0xxx18_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK65FN2M0CAC18
** MK65FN2M0VMI18
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K65P169M180SF5RM_NDA, Rev. 2, December 2013
** Version: rev. 2.2, 2014-10-14
** Build: b141113
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0000FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

133
targets/common/linker/arm/MK80F25615/MK80FN256xxx15_application_0x0000.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK80FN256CAx15
** MK80FN256VDC15
** MK80FN256VLL15
** MK80FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K80P121M150SF5RM, Rev. 2, May 2015
** Version: rev. 2.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MK80F25615/MK80FN256xxx15_application_0xa000.scf Normal file
View File

@@ -0,0 +1,136 @@
#! armcc -E
/*
** ###################################################################
** Processors: MK80FN256CAx15
** MK80FN256VDC15
** MK80FN256VLL15
** MK80FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K80P121M150SF5RM, Rev. 2, May 2015
** Version: rev. 2.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MK80F25615/MK80FN256xxx15_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK80FN256CAx15
** MK80FN256VDC15
** MK80FN256VLL15
** MK80FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K80P121M150SF5RM, Rev. 2, May 2015
** Version: rev. 2.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

93
targets/common/linker/arm/MK80F25615/MK80FN256xxx15_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MK80FN256CAx15
** MK80FN256VDC15
** MK80FN256VLL15
** MK80FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K80P121M150SF5RM, Rev. 2, May 2015
** Version: rev. 2.1, 2015-05-28
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0000FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

133
targets/common/linker/arm/MK82F25615/MK82FN256xxx15_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK82FN256CAx15
** MK82FN256VDC15
** MK82FN256VLL15
** MK82FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K82P121M150SF5RM, Rev. 0, May 2015
** Version: rev. 1.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MK82F25615/MK82FN256xxx15_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK82FN256CAx15
** MK82FN256VDC15
** MK82FN256VLL15
** MK82FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K82P121M150SF5RM, Rev. 0, May 2015
** Version: rev. 1.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MK82F25615/MK82FN256xxx15_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK82FN256CAx15
** MK82FN256VDC15
** MK82FN256VLL15
** MK82FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K82P121M150SF5RM, Rev. 0, May 2015
** Version: rev. 1.1, 2015-05-28
** Build: b150626
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

93
targets/common/linker/arm/MK82F25615/MK82FN256xxx15_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK82FN256CAx15
** MK82FN256VDC15
** MK82FN256VLL15
** MK82FN256VLQ15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K82P121M150SF5RM, Rev. 0, May 2015
** Version: rev. 1.1, 2015-05-28
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF0000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF0400
#define m_text_size 0x0000FC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

133
targets/common/linker/arm/MKL25Z4/MKL25Z128xxx4_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL25Z128VFM4
** MKL25Z128VFT4
** MKL25Z128VLH4
** MKL25Z128VLK4
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL25P80M48SF0RM, Rev.3, Sep 2012
** Version: rev. 2.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00001000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00003000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

124
targets/common/linker/arm/MKL25Z4/MKL25Z128xxx4_application_0x8000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL25Z128VFM4
** MKL25Z128VFT4
** MKL25Z128VLH4
** MKL25Z128VLK4
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL25P80M48SF0RM, Rev.3, Sep 2012
** Version: rev. 2.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00008000
#define m_interrupts_size 0x000003C0
#define m_flash_config_start 0x00008400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00008410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00001000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00003000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

121
targets/common/linker/arm/MKL25Z4/MKL25Z128xxx4_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL25Z128VFM4
** MKL25Z128VFT4
** MKL25Z128VLH4
** MKL25Z128VLK4
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL25P80M48SF0RM, Rev.3, Sep 2012
** Version: rev. 2.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000100
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000100
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

93
targets/common/linker/arm/MKL25Z4/MKL25Z128xxx4_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL25Z128VFM4
** MKL25Z128VFT4
** MKL25Z128VLH4
** MKL25Z128VLK4
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL25P80M48SF0RM, Rev.3, Sep 2012
** Version: rev. 2.5, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFF000
#define m_interrupts_size 0x00000100
#define m_text_start 0x1FFFF100
#define m_text_size 0x00003F00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

133
targets/common/linker/arm/MKL28Z7/MKL28Z512xxx7_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MKL28Z7/MKL28Z512xxx7_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

145
targets/common/linker/arm/MKL28Z7/MKL28Z512xxx7_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00016000 - m_interrupts_ram_size)
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

114
targets/common/linker/arm/MKL28Z7/MKL28Z512xxx7_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFA000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFA400
#define m_text_size 0x00015C00
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

133
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x0006000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
targets/common/linker/arm/MKL81Z7/MKL81Z128xxx7_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00006000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

151
targets/common/linker/arm/MKL81Z7/MKL81Z128xxx7_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00018000 - m_interrupts_ram_size)
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

113
targets/common/linker/arm/MKL81Z7/MKL81Z128xxx7_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFA000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFA400
#define m_text_size 0x00017C00
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

133
targets/common/linker/arm/MKL82Z7/MKL82Z128xxx7_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x0006000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

136
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00006000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00012000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

145
targets/common/linker/arm/MKL82Z7/MKL82Z128xxx7_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFFA000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00018000 - m_interrupts_ram_size)
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

113
targets/common/linker/arm/MKL82Z7/MKL82Z128xxx7_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKL28Z512VDC7
** MKL28Z512VLH7
** MKL28Z512VLL7
** MKL28Z512VMP7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KL28SINGLERM, Rev. 0, June 1, 2015
** Version: rev. 1.12, 2015-06-03
** Build: b150630
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFA000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFA400
#define m_text_size 0x00017C00
#if (defined(__usb_use_usbram__))
#define m_usb_sram_start 0x40100000
#define m_usb_sram_size 0x00000800
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}
#if (defined(__usb_use_usbram__))
LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
ER_m_usb_bdt m_usb_sram_start usb_bdt_size {
* (m_usb_bdt)
}
}
LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
* (m_usb_global)
}
}
#endif

125
targets/common/linker/arm/MKS22F25612/MKS22FN256xxx12_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MKS22F25612/MKS22FN256xxx12_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

128
targets/common/linker/arm/MKS22F25612/MKS22FN256xxx12_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

94
targets/common/linker/arm/MKS22F25612/MKS22FN256xxx12_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MK22FN256CAH12
** MK22FN256VDC12
** MK22FN256VLH12
** MK22FN256VLL12
** MK22FN256VMP12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: K22P121M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.8, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFC000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFC400
#define m_text_size 0x0000BC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

133
targets/common/linker/arm/MKV11Z7/MKV11Z128xxx7_application_0x0000.scf Normal file
View File

@@ -0,0 +1,133 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV11Z128VLC7
** MKV11Z128VFM7
** MKV11Z128VLF7
** MKV11Z128VLH7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV11P64M75RM Rev.2, April 2015
** Version: rev. 1.0, 2014-12-14
** Build: b150416
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x000003C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00001000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00003000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

133
targets/common/linker/arm/MKV11Z7/MKV11Z128xxx7_application_0xa000.scf Normal file
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@@ -0,0 +1,133 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV11Z128VLC7
** MKV11Z128VFM7
** MKV11Z128VLF7
** MKV11Z128VLH7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV11P64M75RM Rev.2, April 2015
** Version: rev. 1.0, 2014-12-14
** Build: b150416
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x000003C0
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x000003C0
#define m_bootloader_config_start 0x0000a3C0
#define m_bootloader_config_size 0x00000040
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00001000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00003000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_bootloader_config m_bootloader_config_start m_bootloader_config_size {
ER_m_bootloader_config m_bootloader_config_start m_bootloader_config_size { ; load address = execution address
* (BootloaderConfig)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

121
targets/common/linker/arm/MKV11Z7/MKV11Z128xxx7_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV11Z128VLC7
** MKV11Z128VFM7
** MKV11Z128VLF7
** MKV11Z128VLH7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV11P64M75RM Rev.2, April 2015
** Version: rev. 1.0, 2014-12-14
** Build: b150416
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFF000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

94
targets/common/linker/arm/MKV11Z7/MKV11Z128xxx7_ram_flashloader.scf Normal file
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@@ -0,0 +1,94 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV11Z128VLC7
** MKV11Z128VFM7
** MKV11Z128VLF7
** MKV11Z128VLH7
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV11P64M75RM Rev.2, April 2015
** Version: rev. 1.0, 2014-12-14
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFF000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFF400
#define m_text_size 0x00003C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

123
targets/common/linker/arm/MKV30F12810/MKV30F128xxx10_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

126
targets/common/linker/arm/MKV30F12810/MKV30F128xxx10_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

126
targets/common/linker/arm/MKV30F12810/MKV30F128xxx10_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00002000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0200
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

92
targets/common/linker/arm/MKV30F12810/MKV30F128xxx10_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MKV30F128VFM10
** MKV30F128VLF10
** MKV30F128VLH10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV30P64M100SFARM, Rev. 0, February 14, 2014
** Version: rev. 0.5, 2015-02-19
** Build: b150602
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFE000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFE400
#define m_text_size 0x00003C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0200
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MKV31F12810/MKV31F128xxx10_application_0x0000.scf Normal file
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@@ -0,0 +1,122 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV31F128VLH10
** MKV31F128VLL10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F12810/MKV31F128xxx10_application_0xa000.scf Normal file
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@@ -0,0 +1,125 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV31F128VLH10
** MKV31F128VLL10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F12810/MKV31F128xxx10_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F128VLH10
** MKV31F128VLL10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0001FBF0
#define m_interrupts_ram_start 0x1FFFE000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00002000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MKV31F12810/MKV31F128xxx10_ram_flashloader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F128VLH10
** MKV31F128VLL10
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M100SF9RM, Rev. 1, April 25, 2014
** Version: rev. 1.6, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFE000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFE400
#define m_text_size 0x00005C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MKV31F25612/MKV31F256xxx12_application_0x0000.scf Normal file
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@@ -0,0 +1,122 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV31F256VLH12
** MKV31F256VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F25612/MKV31F256xxx12_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F256VLH12
** MKV31F256VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F25612/MKV31F256xxx12_flashloader_loader.scf Normal file
View File

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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F256VLH12
** MKV31F256VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00008000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MKV31F25612/MKV31F256xxx12_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F256VLH12
** MKV31F256VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF8RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFC000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFC400
#define m_text_size 0x0000BC00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MKV31F51212/MKV31F512xxx12_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F512VLH12
** MKV31F512VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF8000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00008000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F51212/MKV31F512xxx12_application_0xa000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F512VLH12
** MKV31F512VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF8000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00008000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV31F51212/MKV31F512xxx12_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F512VLH12
** MKV31F512VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_interrupts_ram_start 0x1FFF8000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00008000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MKV31F51212/MKV31F512xxx12_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV31F512VLH12
** MKV31F512VLL12
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV31P100M120SF7RM, Rev. 1, March 24, 2014
** Version: rev. 1.7, 2015-02-19
** Build: b150629
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFF8000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFF8400
#define m_text_size 0x00017C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

122
targets/common/linker/arm/MKV46F16/MKV46F256xxx16_application_0x0000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV46F256VLH15
** MKV46F256VLL15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV4XP100M150RM Rev 2, 02/2015
** Version: rev. 1.2, 2015-11-02
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size + m_data_2_size-Stack_Size-Heap_Size{ ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV46F16/MKV46F256xxx16_application_0xa000.scf Normal file
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@@ -0,0 +1,125 @@
#! armcc -E
/*
** ###################################################################
** Processors: MKV46F256VLH15
** MKV46F256VLL15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV4XP100M150RM Rev 2, 02/2015
** Version: rev. 1.2, 2015-11-02
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x0000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x0000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x0000a410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

125
targets/common/linker/arm/MKV46F16/MKV46F256xxx16_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV46F256VLH15
** MKV46F256VLL15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV4XP100M150RM Rev 2, 02/2015
** Version: rev. 1.2, 2015-11-02
** Build: b150317
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x00000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0003FBF0
#define m_interrupts_ram_start 0x1FFFC000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00004000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

91
targets/common/linker/arm/MKV46F16/MKV46F256xxx16_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processors: MKV46F256VLH15
** MKV46F256VLL15
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV4XP100M150RM Rev 2, 02/2015
** Version: rev. 1.2, 2015-11-02
** Build: b150602
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x1FFFC000
#define m_interrupts_size 0x00000400
#define m_text_start 0x1FFFC400
#define m_text_size 0x00007C00
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

126
targets/common/linker/arm/MKV58F22/MKV58F1M0xxx22_application_0x10000000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processor: MKV58F1M0VMD22
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV5xP64M75RM Rev.0, November 2014
** Version: rev. 0.1, 2015-02-24
** Build: b150423
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x10000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x10000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x10000410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x00000000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start 0x20000000
#define m_data_size 0x00020000
/*#define m_text_itcm_start (m_interrupts_ram_start + m_interrupts_ram_size)*/
/*#define m_text_itcm_size (0x00010000 - m_interrupts_ram_size)*/
#define m_data_itcm_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_itcm_size (0x00010000 - m_interrupts_ram_size)
#define m_data_ocram_start 0x2F000000
#define m_data_ocram_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_itcm_start m_data_itcm_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(RW_m_data)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

129
targets/common/linker/arm/MKV58F22/MKV58F1M0xxx22_application_0x1000a000.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processor: MKV58F1M0VMD22
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV5xP64M75RM Rev.0, November 2014
** Version: rev. 0.1, 2015-02-24
** Build: b150423
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x1000a000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x1000a400
#define m_flash_config_size 0x00000010
#define m_text_start 0x1000a410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x00000000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start 0x20000000
#define m_data_size 0x00020000
#define m_text_itcm_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_text_itcm_size (0x00010000 - m_interrupts_ram_size)
#define m_data_ocram_start 0x2F000000
#define m_data_ocram_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
ER_m_text_itcm m_text_itcm_start m_text_itcm_size { ; load address = execution address
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_ocram m_data_ocram_start m_data_ocram_size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data) == m_data_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

129
targets/common/linker/arm/MKV58F22/MKV58F1M0xxx22_flashloader_loader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processor: MKV58F1M0VMD22
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV5xP64M75RM Rev.0, November 2014
** Version: rev. 0.1, 2015-02-24
** Build: b150423
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x10000000
#define m_interrupts_size 0x00000400
#define m_flash_config_start 0x10000400
#define m_flash_config_size 0x00000010
#define m_text_start 0x10000410
#define m_text_size 0x000FFBF0
#define m_interrupts_ram_start 0x00000000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start 0x20000000
#define m_data_size 0x00020000
#define m_text_itcm_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_text_itcm_size (0x00010000 - m_interrupts_ram_size)
#define m_data_ocram_start 0x2F000000
#define m_data_ocram_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
ER_m_text_itcm m_text_itcm_start m_text_itcm_size { ; load address = execution address
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
RW_m_data_ocram m_data_ocram_start m_data_ocram_size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP ((ImageLimit(RW_m_data) == m_data_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size-Stack_Size EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
#if (!defined(__ram_vector_table__))
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_flash_config m_flash_config_start m_flash_config_size {
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
* (FlashConfig)
}
}
#if (defined(__ram_vector_table__))
LR_m_interrupts_ram m_interrupts_ram_start m_interrupts_ram_size {
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
}
#endif

95
targets/common/linker/arm/MKV58F22/MKV58F1M0xxx22_ram_flashloader.scf Normal file
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#! armcc -E
/*
** ###################################################################
** Processor: MKV58F1M0VMD22
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: KV5xP64M75RM Rev.0, November 2014
** Version: rev. 0.1, 2015-02-24
** Build: b150423
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_data_start 0x20000000
#define m_data_size 0x00020000
#define m_text_start 0x00000400
#define m_text_size 0x0000FC00
#define m_text_ocram_start 0x2F000000
#define m_text_ocram_size 0x00010000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0000
#endif
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size - Stack_Size-Heap_Size{ ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP (ImageLimit(ER_m_text)) EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK (ImageLimit(ARM_LIB_HEAP) + Stack_Size) EMPTY -Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
}
}
LR_m_interrupts_ram m_interrupts_start m_interrupts_size {
VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address
.ANY (.m_interrupts_ram)
}
}

43
targets/common/linker/iar/MK02F12810/K02F128xxx10_application_0x0000.icf Normal file
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@@ -0,0 +1,43 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (64*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (8*1024);
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (1*512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (8*1024) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (64*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (8*1024);
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x0000A000; /*-User Application Base-*/
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (1*512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (8*1024) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK02F12810/K02F128xxx10_flashloader_loader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (64*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (8*1024);
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + ((8*1024)) - 1;
define exported symbol __VECTOR_TABLE = 0x00000000;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place at end of RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK02F12810/K02F128xxx10_ram_flashloader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (64*1024);
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (8*1024);
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_RAM_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + ((8*1024));
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in RAM_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F12810/K22FN128xxx10_application_0x0000.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (128*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (24*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (4*1024);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((24*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F12810/K22FN128xxx10_application_0xA000.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (128*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (24*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x0000A000; /*-User Application Base-*/
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((24*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F12810/K22FN128xxx10_flashloader_loader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (128*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (24*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((24*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place at end of RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F12810/K22FN128xxx10_ram_flashloader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (128*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (24*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_RAM_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (512);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((24*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in RAM_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F25612/K22FN256xxx12_application_0x0000.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (256*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (48*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (4*1024);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((48*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F25612/K22FN256xxx12_application_0xA000.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (256*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (48*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x0000A000; /*-User Application Base-*/
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (1*1024);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((48*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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targets/common/linker/iar/MK22F25612/K22FN256xxx12_flashloader_loader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (256*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (48*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_FLASH_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (1*1024);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((48*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal,block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in FLASH_region { block ApplicationFlash };
place at end of RAM_region { block ApplicationRam };

44
targets/common/linker/iar/MK22F25612/K22FN256xxx12_ram_flashloader.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x0;
define symbol __ICFEDIT_region_FLASH_end__ = __ICFEDIT_region_FLASH_start__ + (256*1024) - 1;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_start__ = __ICFEDIT_region_RAM_end__ - (48*1024)/3;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = __ICFEDIT_region_RAM_start__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = (1*1024);
define symbol __ICFEDIT_size_heap__ = (0*1024);
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = __region_RAM2_start__ + (((48*1024)*2)/3) - 1;
define exported symbol __VECTOR_TABLE = __ICFEDIT_region_FLASH_start__;
define exported symbol __VECTOR_RAM = __ICFEDIT_region_RAM_start__;
define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize manually { readwrite };
initialize manually { section .data};
initialize manually { section .textrw };
do not initialize { section .noinit };
define block USBGlobal {section m_usb_bdt, section m_usb_global};
define block CodeRelocate { section .textrw_init };
define block CodeRelocateRam { section .textrw };
define block ApplicationFlash { readonly, block CodeRelocate };
define block ApplicationRam { readwrite, block CodeRelocateRam, block USBGlobal, block CSTACK, block HEAP };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section .noinit };
place in RAM_region { block ApplicationFlash };
place in RAM_region { block ApplicationRam };

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