Add KBOOT.

targets/MK22F25612/src/bootloader_config.h

@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2014-2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __BOOTLOADER_CONFIG_H__
+#define __BOOTLOADER_CONFIG_H__
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+//
+// Bootloader configuration options
+//
+
+//! @name Peripheral configuration macros
+//@{
+
+#if !defined(BL_CONFIG_SCUART)
+#define BL_CONFIG_SCUART (1)
+#endif
+#if !defined(BL_CONFIG_I2C)
+#define BL_CONFIG_I2C (1)
+#endif
+#if !defined(BL_CONFIG_DSPI)
+#define BL_CONFIG_DSPI (1)
+#endif
+#if !defined(BL_CONFIG_USB_HID)
+#define BL_CONFIG_USB_HID (1)
+#endif
+#if !defined(BL_CONFIG_USB_MSC)
+#define BL_CONFIG_USB_MSC (1)
+#endif
+
+//@}
+
+#if !defined(BL_TARGET_FLASH) && !defined(BL_TARGET_RAM)
+#define BL_TARGET_FLASH (1)
+#endif
+
+#if defined(BL_TARGET_RAM)
+#define BL_FEATURE_FLASH_SECURITY (0)
+#else
+#define BL_FEATURE_FLASH_SECURITY (1)
+#endif
+
+#define BL_FEATURE_QSPI_MODULE (0)
+
+#define BL_FEATURE_ENCRYPTION (0)
+
+// Bootloader peripheral detection default timeout in milliseconds
+// After coming out of reset the bootloader will spin in a peripheral detection
+// loop for this amount of time. A zero value means no time out.
+#if DEBUG
+#define BL_DEFAULT_PERIPHERAL_DETECT_TIMEOUT 0
+#else
+#define BL_DEFAULT_PERIPHERAL_DETECT_TIMEOUT 5000
+#endif // DEBUG
+
+#define BL_FEATURE_POWERDOWN (0)
+
+// Bootloader powerdown timeout in milliseconds
+// The bootloader enters a low power mode after waiting for this amount of time. A zero value means // no time out. Only
+// applicable if BL_FEATURE_POWERDOWN is enabled.
+#if DEBUG
+#define BL_DEFAULT_POWERDOWN_TIMEOUT 10000
+#else
+#define BL_DEFAULT_POWERDOWN_TIMEOUT 600000
+#endif // DEBUG
+
+#if !defined(BL_TARGET_RAM)
+#define BL_FEATURE_CRC_CHECK (1)
+#endif
+
+#define BL_FEATURE_UART_AUTOBAUD_IRQ (1)
+
+// The bootloader will check this address for the application vector table upon startup.
+#if !defined(BL_APP_VECTOR_TABLE_ADDRESS)
+#define BL_APP_VECTOR_TABLE_ADDRESS 0xa000
+#endif
+
+/* Serial Port Info */
+
+/**************************************************************************
+ * Note:
+ *
+ * Because of the changes to the UART modules, we can no longer define
+ * the TERM_PORT as a base pointer.  The uart functions have been modified
+ * accommodate this change.  Now, TERM_PORT_NUM must be defined as the
+ * number of the UART port desired to use
+ *
+ * TERM_PORT_NUM = 0  -- This allows you to use UART0; default pins are
+ *                        PTA14 and PTA15
+ *
+ * TERM_PORT_NUM = 1  -- This allows you to use UART1; default pins are
+ *                        PTC3 and PTC4
+ *
+ * TERM_PORT_NUM = 2  -- This allows you to use UART2; default pins are
+ *                        PTD2 and PTD3
+ *
+ *************************************************************************/
+#define TERM_PORT_NUM 0
+
+#define TERMINAL_BAUD 19200
+#undef HW_FLOW_CONTROL
+
+#endif // __BOOTLOADER_CONFIG_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/clock_config_K22F256.c

@@ -0,0 +1,228 @@
+/*
+ * Copyright (c) 2014-2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bootloader_common.h"
+#include "bootloader/bl_context.h"
+#include "property/property.h"
+#include "fsl_device_registers.h"
+#include "utilities/fsl_assert.h"
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+// Clock mode types
+typedef enum _target_clock_mode
+{
+    kClockMode_FEI = 0,
+    kClockMode_FEE = 1,
+    kClockMode_Default = kClockMode_FEI,
+} target_clock_mode_t;
+
+////////////////////////////////////////////////////////////////////////////////
+// Prototypes
+////////////////////////////////////////////////////////////////////////////////
+
+// This function implements clock mode switch between FEI and PEE mode used in this bootloader
+void clock_mode_switch(const target_clock_mode_t currentMode, const target_clock_mode_t expectedMode);
+
+////////////////////////////////////////////////////////////////////////////////
+// Code
+////////////////////////////////////////////////////////////////////////////////
+
+// See bootloader_common.h for documentation on this function.
+void configure_clocks(bootloader_clock_option_t option)
+{
+#if BL_TARGET_FLASH
+
+    static target_clock_mode_t s_currentClockMode = kClockMode_FEI;
+    static uint32_t s_defaultClockDivider;
+
+    if (option == kClockOption_EnterBootloader)
+    {
+        s_defaultClockDivider = SIM->CLKDIV1;
+
+        // General procedure to be implemented:
+        // 1. Read clock flags and divider from bootloader config in property store
+        bootloader_configuration_data_t *config = &g_bootloaderContext.propertyInterface->store->configurationData;
+        uint8_t options = config->clockFlags;
+
+        // Check if the USB HID peripheral is enabled. If it is enabled, we always
+        // use the 48MHz IRC.
+        bool isUsbEnabled = config->enabledPeripherals & kPeripheralType_USB_HID;
+
+        // 2. If NOT High Speed and USB isn't enabled, do nothing (use reset clock config)
+        if ((options & kClockFlag_HighSpeed) && (!isUsbEnabled))
+        {
+            // Get actual Core clock.
+            SystemCoreClock =
+                kDefaultClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT) + 1);
+
+            // High speed flag is set (meaning disabled), so just use default clocks.
+            return;
+        }
+
+        // 3. Set OUTDIV1 based on divider in config. OUTDIV4 starts out at /1.
+        // The divider values are masked by the maximum bits per divider.
+        uint32_t div1 = ((~config->clockDivider) & (SIM_CLKDIV1_OUTDIV1_MASK >> SIM_CLKDIV1_OUTDIV1_SHIFT)) + 1;
+
+        // 4. Get MCGOUTCLK
+        uint32_t McgOutClk = kHIRC;
+
+        // 5. Keep core clock up kMinCoreClockWithUsbSupport if usb is supported.
+        uint32_t freq = McgOutClk;
+        // If USB is enabled, the CPU clock must not be allowed to go below 20 MHz
+        if (isUsbEnabled)
+        {
+            while ((freq / div1) < kMinCoreClockWithUsbSupport)
+            {
+                --div1;
+            }
+        }
+
+        // 6. Keep core clock below kMaxCoreClock
+        while ((freq / div1) > kMaxCoreClock)
+        {
+            ++div1;
+        }
+
+        assert((div1 >= kDivider_Min) && (div1 <= kDivider_Max));
+
+        uint32_t div2 = div1;
+        uint32_t div4 = div1;
+
+        // 7. Keep bus freq below max.
+        //
+        // The bus clock is divided by OUTDIV2:
+        //      MCGOUTCLK -> OUTDIV2 -> bus_clk
+        freq = McgOutClk;
+        while ((freq / div2) > kMaxBusClock)
+        {
+            // Increase bus clock divider.
+            ++div2;
+        }
+        assert((div2 >= kDivider_Min) && (div2 <= kDivider_Max));
+
+        // 8. Keep flash freq below max.
+        //
+        // The flash clock is diveded by OUTDIV4:
+        //      MCGOUTCLK -> OUTDIV4 ->flash_clk
+        freq = McgOutClk;
+        while ((freq / div4) > kMaxFlashClock)
+        {
+            // Increase bus/flash clock divider.
+            ++div4;
+        }
+        assert((div4 >= kDivider_Min) && (div4 <= kDivider_Max));
+
+        if ((div1 == 1) && ((div2 > 8) || (div4 > 8)))
+        {
+            return;
+        }
+
+        // 9. Now set the dividers
+        SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV1(div1 - 1) | SIM_CLKDIV1_OUTDIV2(div2 - 1) |
+                       SIM_CLKDIV1_OUTDIV4(div4 - 1); /* Update system prescalers */
+
+        // 10. Update SystemCoreClock global.
+        SystemCoreClock = McgOutClk / div1;
+
+        clock_mode_switch(s_currentClockMode, kClockMode_FEE);
+        s_currentClockMode = kClockMode_FEE;
+    }
+    else if (option == kClockOption_ExitBootloader)
+    {
+        // Restore from FEE mode to FEI mode
+        clock_mode_switch(s_currentClockMode, kClockMode_FEI);
+
+        // Restore clock divider
+        SIM->CLKDIV1 = s_defaultClockDivider;
+    }
+
+#endif // BL_TARGET_FLASH
+}
+
+void clock_mode_switch(const target_clock_mode_t currentMode, const target_clock_mode_t expectedMode)
+{
+    // Note: here only implements clock switch between FEI and FEE,
+    // The other modes are not supported.
+    assert(currentMode == kClockMode_FEE || currentMode == kClockMode_FEI);
+    assert(expectedMode == kClockMode_FEE || expectedMode == kClockMode_FEI);
+
+    if (currentMode == expectedMode)
+    {
+        return;
+    }
+
+    if (expectedMode == kClockMode_FEE)
+    {
+        uint8_t tmp;
+        /* Switch to FEE mode */
+        tmp = MCG->C2;
+        tmp &= (uint8_t)~MCG_C2_RANGE_MASK;
+        tmp |= MCG_C2_RANGE(2);
+        MCG->C2 = tmp; /* MCG_C2: RANGE = 2 */
+
+        tmp = MCG->C1;
+        tmp &= (uint8_t) ~(MCG_C1_FRDIV_MASK | MCG_C1_IREFS_MASK);
+        tmp |= MCG_C1_FRDIV(6);
+        MCG->C1 = tmp; // FRDIV=6, RANGE=2, divide IRC48M with 1280, switch to external reference clock.
+
+        tmp = MCG->C4;
+        tmp &= (uint8_t)~MCG_C4_DRST_DRS_MASK;
+        tmp |= MCG_C4_DRST_DRS(1);
+        MCG->C4 = tmp; // Multiply with 1280, MCGOUTCLK is 48Mhz
+
+        tmp = MCG->C7;
+        tmp &= (uint8_t)~MCG_C7_OSCSEL_MASK;
+        tmp |= MCG_C7_OSCSEL(2);
+        MCG->C7 = tmp; // Select IRC48M as Oscillator.
+
+        while (MCG->S & MCG_S_IREFST_MASK)
+            ; // Wait until external reference clock is ready.
+    }
+    else if (expectedMode == kClockMode_FEI)
+    {
+        MCG->C1 |= MCG_C1_IREFS_MASK; // Switch to internal reference clock.
+        while (!(MCG->S & MCG_S_IREFST_MASK))
+            ; // Wait until internal reference clock is ready.
+
+        // Restore registers to default value out of reset.
+        MCG->C1 = 0x04U;
+        MCG->C2 = 0x80U;
+
+        MCG->C4 &= (uint8_t)MCG_C4_DRST_DRS_MASK;
+        MCG->C7 = 0;
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/hardware_init_K22F256.c

@@ -0,0 +1,184 @@
+/*
+ * Copyright (c) 2013-2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bootloader_common.h"
+#include "bootloader/bl_context.h"
+#include "fsl_device_registers.h"
+#include "uart/fsl_uart.h"
+#include "utilities/kinetis_family.h"
+#include "smc/smc.h"
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+#ifdef TOWER
+#define BOOT_PIN_NUMBER 7
+#define BOOT_PIN_PORT PORTC
+#define BOOT_PIN_GPIO GPIOC
+#define BOOT_PIN_ALT_MODE 1
+#endif
+
+#ifdef FREEDOM
+#define BOOT_PIN_NUMBER 17
+#define BOOT_PIN_PORT PORTB
+#define BOOT_PIN_GPIO GPIOB
+#define BOOT_PIN_ALT_MODE 1
+#endif
+
+#define BOOT_PIN_DEBOUNCE_READ_COUNT 500
+
+////////////////////////////////////////////////////////////////////////////////
+// Variables
+////////////////////////////////////////////////////////////////////////////////
+
+////////////////////////////////////////////////////////////////////////////////
+// Code
+////////////////////////////////////////////////////////////////////////////////
+
+void init_hardware(void)
+{
+    exit_vlpr();
+
+    // Enable all the ports
+    SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK |
+                   SIM_SCGC5_PORTE_MASK);
+
+    SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; // set PLLFLLSEL to select the IRC48M for this clock source
+}
+
+void deinit_hardware(void)
+{
+    SIM->SCGC5 &= (uint32_t) ~(SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK |
+                               SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK);
+
+    // Restore SIM_SOPTx related bits being changed
+    SIM->SOPT2 &= (uint32_t) ~(SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
+}
+
+bool usb_clock_init(void)
+{
+    // Enable USB-OTG IP clocking
+    SIM->SCGC4 |= (SIM_SCGC4_USBOTG_MASK);
+
+    // If clock of usb module cannot be enabled, return false
+    if (!(SIM->SCGC4 & SIM_SCGC4_USBOTG_MASK))
+    {
+        return false;
+    }
+
+    // Reset the USB peripheral, this must be done here instead of USB driver due to silicon errata
+    // for at least KL25 and K22
+    USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
+    while (USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK)
+        ;
+
+    // Select IRC48M clock, SIM_SOPT2_USBSRC_MASK selects internal clock,
+    // 0x30000 = SIM_SOPT2_PLLFLLSEL_MASK, selects IRC48MHz clock
+    SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
+
+    // need to set the clock_recover_en and irc_en register
+    USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
+    USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
+
+    return true;
+}
+
+uint32_t get_bus_clock(void)
+{
+    uint32_t busClockDivider = ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1;
+    return (SystemCoreClock / busClockDivider);
+}
+
+uint32_t get_uart_clock(uint32_t instance)
+{
+    switch (instance)
+    {
+        case 0:
+        case 1:
+            // UART0 and UART1 always use the system clock
+            return SystemCoreClock;
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+        default:
+            return 0;
+    }
+}
+
+bool is_boot_pin_asserted(void)
+{
+#ifdef BL_TARGET_FLASH
+    // Initialize boot pin for GPIO
+    BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= PORT_PCR_MUX(BOOT_PIN_ALT_MODE);
+
+    // Set boot pin as an input
+    BOOT_PIN_GPIO->PDDR &= (uint32_t) ~(1 << BOOT_PIN_NUMBER);
+    // Set boot pin pullup enabled, pullup select, filter enable
+    BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK | PORT_PCR_PFE_MASK);
+
+    uint32_t readCount = 0;
+
+    // Sample the pin a number of times
+    for (uint32_t i = 0; i < BOOT_PIN_DEBOUNCE_READ_COUNT; i++)
+    {
+        readCount += ((BOOT_PIN_GPIO->PDIR) >> BOOT_PIN_NUMBER) & 1;
+    }
+
+    // boot pin is pulled high so we are measuring lows, make sure most of our measurements
+    // registered as low
+    return (readCount < (BOOT_PIN_DEBOUNCE_READ_COUNT / 2));
+#else
+    // Boot pin for Flash only target
+    return false;
+#endif
+}
+
+void debug_init(void)
+{
+}
+
+#if __ICCARM__
+
+size_t __write(int handle, const unsigned char *buf, size_t size)
+{
+    return size;
+}
+
+#endif // __ICCARM__
+
+void update_available_peripherals()
+{
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/memory_map_K22F256.c

@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bootloader/bl_context.h"
+#include "memory/memory.h"
+
+////////////////////////////////////////////////////////////////////////////////
+// Variables
+////////////////////////////////////////////////////////////////////////////////
+
+//! @brief Memory map for K22F256
+//!
+//! This map is not const because it is updated at runtime with the actual sizes of
+//! flash and RAM for the chip we're running on.
+memory_map_entry_t g_memoryMap[] = {
+    { 0x00000000, 0x0003ffff, kMemoryIsExecutable, &g_flashMemoryInterface },   // Flash array (256KB)
+    { 0x1fffc000, 0x20007fff, kMemoryIsExecutable, &g_normalMemoryInterface },  // SRAM (48KB)
+    { 0x40000000, 0x4007ffff, kMemoryNotExecutable, &g_deviceMemoryInterface }, // AIPS peripherals
+    { 0x400ff000, 0x400fffff, kMemoryNotExecutable, &g_deviceMemoryInterface }, // GPIO
+    { 0xe0000000, 0xe00fffff, kMemoryNotExecutable, &g_deviceMemoryInterface }, // M4 private peripherals
+    { 0 }                                                                       // Terminator
+};
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/peripherals_K22F256.c

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2013-2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bootloader/bl_context.h"
+#include "bootloader/bl_peripheral_interface.h"
+#include "packet/serial_packet.h"
+
+extern void uart_pinmux_config(uint32_t instance, pinmux_type_t pinmux);
+extern void i2c_pinmux_config(uint32_t instance, pinmux_type_t pinmux);
+extern void spi_pinmux_config(uint32_t instance, pinmux_type_t pinmux);
+////////////////////////////////////////////////////////////////////////////////
+// Variables
+////////////////////////////////////////////////////////////////////////////////
+
+#if !BL_CONFIG_SCUART && !BL_CONFIG_I2C && !BL_CONFIG_DSPI && !BL_CONFIG_USB_HID
+#error At least one peripheral must be enabled!
+#endif
+
+//! @brief Peripheral array for K22F5256.
+const peripheral_descriptor_t g_peripherals[] = {
+#if BL_CONFIG_SCUART
+    // UART1
+    {.typeMask = kPeripheralType_UART,
+     .instance = 1,
+     .pinmuxConfig = uart_pinmux_config,
+     .controlInterface = &g_scuartControlInterface,
+     .byteInterface = &g_scuartByteInterface,
+     .packetInterface = &g_framingPacketInterface },
+#endif // BL_CONFIG_SCUART
+#if BL_CONFIG_I2C
+    // I2C1
+    {.typeMask = kPeripheralType_I2CSlave,
+     .instance = 1,
+     .pinmuxConfig = i2c_pinmux_config,
+     .controlInterface = &g_i2cControlInterface,
+     .byteInterface = &g_i2cByteInterface,
+     .packetInterface = &g_framingPacketInterface },
+#endif // BL_CONFIG_I2C
+#if BL_CONFIG_DSPI
+    // SPI1
+    {.typeMask = kPeripheralType_SPISlave,
+     .instance = 1,
+     .pinmuxConfig = spi_pinmux_config,
+     .controlInterface = &g_dspiControlInterface,
+     .byteInterface = &g_dspiByteInterface,
+     .packetInterface = &g_framingPacketInterface },
+#endif // BL_CONFIG_DSPI
+
+#if (BL_CONFIG_USB_HID || BL_CONFIG_USB_MSC)
+    // USB HID
+    {.typeMask = kPeripheralType_USB_HID,
+     .instance = 0,
+     .pinmuxConfig = NULL,
+     .controlInterface = &g_usbHidControlInterface,
+     .byteInterface = NULL,
+     .packetInterface = &g_usbHidPacketInterface },
+#endif // BL_CONFIG_USB_HID
+
+    { 0 } // Terminator
+};
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/peripherals_pinmux.h

@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "fsl_device_registers.h"
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+//! peripheral enable configurations
+#define BL_ENABLE_PINMUX_UART1 (BL_CONFIG_SCUART)
+#define BL_ENABLE_PINMUX_SPI1 (BL_CONFIG_DSPI)
+#define BL_ENABLE_PINMUX_I2C1 (BL_CONFIG_I2C)
+
+//! UART pinmux configurations
+#define UART1_RX_PORT_BASE PORTE
+#define UART1_RX_GPIO_BASE PTE
+#define UART1_RX_GPIO_PIN_NUM 1  // PTE1
+#define UART1_RX_FUNC_ALT_MODE 3 // ALT mode for UART1 RX functionality
+#define UART1_RX_GPIO_ALT_MODE 1 // ALT mdoe for GPIO functionality
+#define UART1_RX_GPIO_IRQn PORTE_IRQn
+#define UART1_RX_GPIO_IRQHandler PORTE_IRQHandler
+#define UART1_TX_PORT_BASE PORTE
+#define UART1_TX_GPIO_PIN_NUM 0  // PTE0
+#define UART1_TX_FUNC_ALT_MODE 3 // ALT mode for UART1 TX functionality
+
+//! I2C pinmux configurations
+#define I2C1_SCL_PORT_BASE PORTC
+#define I2C1_SCL_GPIO_PIN_NUM 10 // PTC10
+#define I2C1_SCL_FUNC_ALT_MODE 2 // ALT mode for I2C1 SCL functionality
+#define I2C1_SDA_PORT_BASE PORTC
+#define I2C1_SDA_GPIO_PIN_NUM 11 // PTC11
+#define I2C1_SDA_FUNC_ALT_MODE 2 // ALT mode for I2C1 SDA functionality
+
+//! SPI pinmux configurations
+#define SPI1_PCS_PORT_BASE PORTD
+#define SPI1_PCS_GPIO_PIN_NUM 4  // PTD4
+#define SPI1_PCS_FUNC_ALT_MODE 7 // ALT mode for SPI1 PCS functionality
+#define SPI1_SCK_PORT_BASE PORTD
+#define SPI1_SCK_GPIO_PIN_NUM 5  // PTD5
+#define SPI1_SCK_FUNC_ALT_MODE 7 // ALT mode for SPI1 SCK functionality
+#define SPI1_SOUT_PORT_BASE PORTD
+#define SPI1_SOUT_GPIO_PIN_NUM 6  // PTD6
+#define SPI1_SOUT_FUNC_ALT_MODE 7 // ALT mode for SPI1 SOUT functionality
+#define SPI1_SIN_PORT_BASE PORTD
+#define SPI1_SIN_GPIO_PIN_NUM 7  // PTD7
+#define SPI1_SIN_FUNC_ALT_MODE 7 // ALT mode for SPI1 SIN functionality
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/startup/system_MK22F25612.c

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2014-2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+#include "system_MK22F25612.h"
+#include "fsl_device_registers.h"
+#include "target_config.h"
+
+#ifndef DISABLE_WDOG
+#define DISABLE_WDOG 1
+#endif
+
+/* ----------------------------------------------------------------------------
+   -- Core clock
+   ---------------------------------------------------------------------------- */
+
+uint32_t SystemCoreClock = kDefaultClock;
+
+/* ----------------------------------------------------------------------------
+   -- SystemInit()
+   ---------------------------------------------------------------------------- */
+
+void SystemInit(void)
+{
+#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
+    SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access */
+#endif                                                 /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
+
+#if (DISABLE_WDOG)
+    WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xC520); /* Key 1 */
+    /* WDOG->UNLOCK: WDOGUNLOCK=0xD928 */
+    WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xD928); /* Key 2 */
+                                                   /* WDOG->STCTRLH:
+                                                    * ?=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,?=0,?=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKSRC=1,WDOGEN=0
+                                                    */
+    WDOG->STCTRLH = WDOG_STCTRLH_BYTESEL(0x00) | WDOG_STCTRLH_WAITEN_MASK | WDOG_STCTRLH_STOPEN_MASK |
+                    WDOG_STCTRLH_ALLOWUPDATE_MASK | WDOG_STCTRLH_CLKSRC_MASK | 0x0100U;
+#endif /* (DISABLE_WDOG) */
+}

targets/MK22F25612/src/startup/system_MK22F25612.h

@@ -0,0 +1,169 @@
+/*
+** ###################################################################
+**     Compilers:           ARM Compiler
+**                          Freescale C/C++ for Embedded ARM
+**                          GNU C Compiler
+**                          GNU C Compiler - CodeSourcery Sourcery G++
+**                          IAR ANSI C/C++ Compiler for ARM
+**
+**     Reference manual:    K22P121M120SF8RM, Rev. 0.61, January 10, 2014
+**     Version:             rev. 1.4, 2014-02-10
+**
+**     Abstract:
+**         Provides a system configuration function and a global variable that
+**         contains the system frequency. It configures the device and initializes
+**         the oscillator (PLL) that is part of the microcontroller device.
+**
+**     Copyright: 2014 Freescale, Inc.
+**     All rights reserved.
+**
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     o Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     o Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.freescale.com
+**     mail:                 support@freescale.com
+**
+**     Revisions:
+**     - rev. 1.0 (2013-09-17)
+**         Initial version.
+**     - rev. 1.1 (2013-10-29)
+**         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
+**     - rev. 1.2 (2013-12-20)
+**         Update according to reference manual rev. 0.6,
+**     - rev. 1.3 (2014-02-06)
+**         Update according to reference manual rev. 0.61,
+**     - rev. 1.4 (2014-02-10)
+**         The declaration of clock configurations has been moved to separate header file system_MK22F25612.h
+**
+** ###################################################################
+*/
+
+/*!
+ * @file MK22F25612
+ * @version 1.4
+ * @date 2014-02-10
+ * @brief Device specific configuration file for MK22F25612 (header file)
+ *
+ * Provides a system configuration function and a global variable that contains
+ * the system frequency. It configures the device and initializes the oscillator
+ * (PLL) that is part of the microcontroller device.
+ */
+
+#ifndef _SYSTEM_MK22F25612_H_
+#define _SYSTEM_MK22F25612_H_ /**< Symbol preventing repeated inclusion */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+#define DISABLE_WDOG 1
+
+#ifndef CLOCK_SETUP
+#define CLOCK_SETUP 0
+#endif
+/* Predefined clock setups
+   0 ... Default  part configuration
+         Multipurpose Clock Generator (MCG) in FEI mode.
+         Reference clock source for MCG module: Slow internal reference clock
+         Core clock = 20.97152MHz
+         Bus clock  = 20.97152MHz
+   1 ... Maximum achievable clock frequency configuration
+         Multipurpose Clock Generator (MCG) in PEE mode.
+         Reference clock source for MCG module: System oscillator 0 reference clock
+         Core clock = 120MHz
+         Bus clock  = 60MHz
+   2 ... Chip internaly clocked, ready for Very Low Power Run mode.
+         Multipurpose Clock Generator (MCG) in BLPI mode.
+         Reference clock source for MCG module: Fast internal reference clock
+         Core clock = 4MHz
+         Bus clock  = 4MHz
+   3 ... Chip externally clocked, ready for Very Low Power Run mode.
+         Multipurpose Clock Generator (MCG) in BLPE mode.
+         Reference clock source for MCG module: System oscillator 0 reference clock
+         Core clock = 4MHz
+         Bus clock  = 4MHz
+   4 ... USB clock setup
+         Multipurpose Clock Generator (MCG) in PEE mode.
+         Reference clock source for MCG module: System oscillator 0 reference clock
+         Core clock = 120MHz
+         Bus clock  = 60MHz
+ */
+
+/* Define clock source values */
+
+#define CPU_XTAL_CLK_HZ 8000000u     /* Value of the external crystal or oscillator clock frequency in Hz */
+#define CPU_XTAL32k_CLK_HZ 32768u    /* Value of the external 32k crystal or oscillator clock frequency in Hz */
+#define CPU_INT_SLOW_CLK_HZ 32768u   /* Value of the slow internal oscillator clock frequency in Hz  */
+#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz  */
+#define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz  */
+
+#if (CLOCK_SETUP == 0)
+#define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */
+#elif(CLOCK_SETUP == 1)
+#define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
+#elif(CLOCK_SETUP == 2)
+#define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
+#elif(CLOCK_SETUP == 3)
+#define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
+#elif(CLOCK_SETUP == 4)
+#define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
+#endif
+
+/**
+ * @brief System clock frequency (core clock)
+ *
+ * The system clock frequency supplied to the SysTick timer and the processor
+ * core clock. This variable can be used by the user application to setup the
+ * SysTick timer or configure other parameters. It may also be used by debugger to
+ * query the frequency of the debug timer or configure the trace clock speed
+ * SystemCoreClock is initialized with a correct predefined value.
+ */
+extern uint32_t SystemCoreClock;
+
+/**
+ * @brief Setup the microcontroller system.
+ *
+ * Typically this function configures the oscillator (PLL) that is part of the
+ * microcontroller device. For systems with variable clock speed it also updates
+ * the variable SystemCoreClock. SystemInit is called from startup_device file.
+ */
+void SystemInit(void);
+
+/**
+ * @brief Updates the SystemCoreClock variable.
+ *
+ * It must be called whenever the core clock is changed during program
+ * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
+ * the current core clock.
+ */
+void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #if !defined(_SYSTEM_MK22F25612_H_) */

targets/MK22F25612/src/target_config.h

@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#if !defined(__TARGET_CONFIG_H__)
+#define __TARGET_CONFIG_H__
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+//! @brief Constants for clock frequencies.
+enum _target_clocks
+{
+    kDefaultClock = 20971520u,
+    kHIRC = 48000000u,
+    kMinCoreClockWithUsbSupport = 20000000u,
+    kMaxCoreClock = 120000000u,
+    kMaxBusClock = 60000000u,
+    kMaxFlashClock = 25000000u,
+
+    kDivider_Min = 1,
+    kDivider_Max = 16,
+};
+
+//! @brief Constants for sram partition
+enum _sram_partition
+{
+    kSram_LowerPart = 1,
+    kSram_UpperPart = 2,
+};
+
+//! @brief Version constants for the target.
+enum _target_version_constants
+{
+    kTarget_Version_Name = 'T',
+    kTarget_Version_Major = 1,
+    kTarget_Version_Minor = 0,
+    kTarget_Version_Bugfix = 0
+};
+
+#endif // __TARGET_CONFIG_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

targets/MK22F25612/src/usb_device_config.h

@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __USB_DEVICE_CONFIG_H__
+#define __USB_DEVICE_CONFIG_H__ 1
+
+#include "bootloader_common.h"
+
+/*!
+ * @addtogroup usb_device_configuration
+ * @{
+ */
+
+/*!
+ * @name Hardware instance define
+ * @{
+ */
+
+/*! @brief KHCI instance count */
+#define USB_DEVICE_CONFIG_KHCI ((BL_CONFIG_USB_HID | BL_CONFIG_USB_MSC))
+
+/*! @brief EHCI instance count */
+#define USB_DEVICE_CONFIG_EHCI (0U)
+
+/*! @brief Device instance count, the sum of KHCI and EHCI instance counts*/
+#define USB_DEVICE_CONFIG_NUM (USB_DEVICE_CONFIG_KHCI + USB_DEVICE_CONFIG_EHCI)
+
+/* @} */
+
+/*!
+ * @name class instance define
+ * @{
+ */
+
+/*! @brief HID instance count */
+#define USB_DEVICE_CONFIG_HID (BL_CONFIG_USB_HID)
+
+/*! @brief CDC ACM instance count */
+#define USB_DEVICE_CONFIG_CDC_ACM (0U)
+
+/*! @brief MSC instance count */
+#define USB_DEVICE_CONFIG_MSC (BL_CONFIG_USB_MSC)
+
+/*! @brief Audio instance count */
+#define USB_DEVICE_CONFIG_AUDIO (0U)
+
+/*! @brief PHDC instance count */
+#define USB_DEVICE_CONFIG_PHDC (0U)
+
+/*! @brief Video instance count */
+#define USB_DEVICE_CONFIG_VIDEO (0U)
+
+/*! @brief CCID instance count */
+#define USB_DEVICE_CONFIG_CCID (0U)
+
+/*! @brief Printer instance count */
+#define USB_DEVICE_CONFIG_PRINTER (0U)
+
+/*! @brief DFU instance count */
+#define USB_DEVICE_CONFIG_DFU (0U)
+
+/* @} */
+
+/*! @brief Whether device is self power. 1 supported, 0 not supported */
+#define USB_DEVICE_CONFIG_SELF_POWER (1U)
+
+/*! @brief Whether device remote wakeup supported. 1 supported, 0 not supported */
+#define USB_DEVICE_CONFIG_REMOTE_WAKEUP (0U)
+
+/*! @brief How many endpoints are supported in the stack. */
+#define USB_DEVICE_CONFIG_ENDPOINTS (8U)
+
+/*! @brief Whether the device task is enabled. */
+#define USB_DEVICE_CONFIG_USE_TASK (0U)
+
+/*! @brief How many the notification message are supported when the device task enabled. */
+#define USB_DEVICE_CONFIG_MAX_MESSAGES (8U)
+
+#if ((defined(USB_DEVICE_CONFIG_KHCI)) && (USB_DEVICE_CONFIG_KHCI > 0U))
+
+/*! @brief The MAX buffer length for the KHCI DMA workaround.*/
+/* clang-format off */
+    #define USB_DEVICE_CONFIG_KHCI_DMA_ALIGN_BUFFER_LENGTH            (64U)
+    /*! @brief Whether handle the USB KHCI bus error. */
+    #define USB_DEVICE_CONFIG_KHCI_ERROR_HANDLING                     (0U)
+/* clang-format on */
+#endif
+
+#if ((defined(USB_DEVICE_CONFIG_EHCI)) && (USB_DEVICE_CONFIG_EHCI > 0U))
+/*! @brief How many the DTD are supported. */
+/* clang-format off */
+    #define USB_DEVICE_CONFIG_EHCI_MAX_DTD                            (16U)
+    /*! @brief Whether handle the USB EHCI bus error. */
+    #define USB_DEVICE_CONFIG_EHCI_ERROR_HANDLING                     (0U)
+    /*! @brief Whether test mode enabled. */
+    #define USB_DEVICE_CONFIG_EHCI_TEST_MODE                          (0U)
+    /*! @brief Whether the EHCI ID pin detect feature enabled. */
+    #define USB_DEVICE_CONFIG_EHCI_ID_PIN_DETECT                      (0U)
+/* clang-format on */
+#endif
+
+/*! @brief Whether the keep alive feature enabled. */
+/* clang-format off */
+#define USB_DEVICE_CONFIG_KEEP_ALIVE_MODE                        (0U)
+
+/*! @brief Whether the transfer buffer is cache-enabled or not. */
+#define USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE              (0U)
+
+/*! @brief Whether the low power mode is enabled or not. */
+#define USB_DEVICE_CONFIG_LOW_POWER_MODE                         (0U)
+
+/*! @brief Whether the device detached feature is enabled or not. */
+#define USB_DEVICE_CONFIG_DETACH_ENABLE                          (0U)
+/* clang-format on */
+
+/* @} */
+
+#endif /* __USB_DEVICE_CONFIG_H__ */