Add KBOOT.

src/startup/ar_asm_macros.h

@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2013-2015 Immo Software
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of the copyright holder nor the names of its contributors may
+ *   be used to endorse or promote products derived from this software without
+ *   specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#if !defined(_ar_asm_macros_h_)
+
+#if defined(__IASMARM__)
+/*
+ * IAR assembler
+ */
+
+#define _CODE_SECTION(name) section name : CODE(4)
+#define _DATA_SECTION(name) section name : DATA(4)
+#define _THUMB thumb
+#define _IMPORT(name) import name
+#define _EXPORT(name) \
+public                \
+    name
+#define _LABEL(name) name
+#define _END end
+#define _FN_BEGIN(name) CFI Block CFIBlock_##name Using CFICommon0
+#define _FN_LABEL(name) _LABEL(name)
+#define _FN_DECL(name) CFI Function name
+#define _FN_BEGIN_POST
+#define _FN_CANT_UNWIND
+#define _FN_END(name) CFI EndBlock CFIBlock_##name
+#define _FN_SIZE(name)
+#define _EQU(name, value) name equ value
+#define _ALIGN(n) alignrom n
+
+/* Insert CFI annotation definitions at top of file */
+/* clang-format off */
+  CFI Names CFINames0
+  CFI StackFrame CFA R13 DATA
+  CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
+  CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, R13:32, R14:32
+  CFI EndNames CFINames0
+
+  CFI Common CFICommon0 Using CFINames0
+  CFI CodeAlign 2
+  CFI DataAlign 4
+  CFI ReturnAddress R14 CODE
+  CFI CFA R13+0
+  CFI R0 SameValue
+  CFI R1 SameValue
+  CFI R2 SameValue
+  CFI R3 SameValue
+  CFI R4 SameValue
+  CFI R5 SameValue
+  CFI R6 SameValue
+  CFI R7 SameValue
+  CFI R8 SameValue
+  CFI R9 SameValue
+  CFI R10 SameValue
+  CFI R11 SameValue
+  CFI R12 SameValue
+  CFI R14 SameValue
+  CFI EndCommon CFICommon0
+/* clang-format on */
+#elif defined(__CC_ARM)
+/*
+ * ARM assembler
+ */
+
+#define _CODE_SECTION(name) AREA | name |, CODE, READONLY
+#define _DATA_SECTION(name) AREA | name |, DATA, READONLY
+#define _THUMB THUMB
+#define _IMPORT(name) IMPORT name
+#define _EXPORT(name) EXPORT name
+#define _LABEL(name) name
+#define _END END
+#define _FN_BEGIN(name) EXPORT name
+#define _FN_LABEL(name) name FUNCTION
+#define _FN_DECL(name)
+#define _FN_BEGIN_POST
+#define _FN_CANT_UNWIND FRAME UNWIND OFF
+#define _FN_END(name) ENDFUNC
+#define _FN_SIZE(name)
+#define _EQU(name, value) name EQU value
+#define _ALIGN(n) align n
+
+#elif defined(__GNUC__)
+/*
+ * GNU assembler
+ */
+
+#define _CODE_SECTION(name) .section name
+#define _DATA_SECTION(name) .section name
+#define _THUMB .thumb
+#define _IMPORT(name) .extern name
+#define _EXPORT(name) .global name
+#define _LABEL(name) name:
+#define _END .end
+#define _FN_BEGIN(name) .thumb_func
+#define _FN_LABEL(name) _LABEL(name)
+#define _FN_DECL(name) .type name, % function
+#define _FN_BEGIN_POST .fnstart
+#define _FN_CANT_UNWIND .cantunwind
+#define _FN_END(name) .fnend
+#define _FN_SIZE(name) .size name, .- name
+#define _EQU(name, value) .equ name, value
+#define _ALIGN(n) .balign n
+
+.syntax unified
+
+#else
+#error "Unsupported assembler"
+#endif
+
+#endif // __ar_asm_macros_h__

src/startup/ar_handlers_cm0p.S

@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2013-2014 Immo Software
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of the copyright holder nor the names of its contributors may
+ *   be used to endorse or promote products derived from this software without
+ *   specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "ar_asm_macros.h"
+
+// EXC_RETURN value to return to Thread mode, while restoring state from PSP.
+_EQU(EXC_RETURN, 0xfffffffd)
+
+/* specify the section where this code belongs */
+
+        _CODE_SECTION(.text)
+        _THUMB
+
+        _IMPORT(ar_kernel_yield_isr)
+
+        _EXPORT(SVC_Handler)
+        _EXPORT(PendSV_Handler)
+
+        _FN_BEGIN(PendSV_Handler)
+        _FN_DECL(PendSV_Handler)
+_FN_LABEL(SVC_Handler)
+_LABEL(PendSV_Handler)
+        _FN_BEGIN_POST
+        _FN_CANT_UNWIND
+
+        // Get PSP
+        mrs     r0, psp
+
+        // Subtract room for the registers we are going to store. We have to pre-subtract
+        // and use the incrementing store multiple instruction because the CM0+ doesn't
+        // have the decrementing variant.
+        subs    r0, r0, #32
+
+        // Save registers on the stack. This has to be done in two stages because
+        // the stmia instruction cannot access the upper registers on the CM0+.
+        stmia   r0!, {r4-r7}
+        mov     r4, r8
+        mov     r5, r9
+        mov     r6, r10
+        mov     r7, r10
+        stmia   r0!, {r4-r7}
+
+        // Get back to the bottom of the stack before we pass the current SP to the
+        // ar_yield call.
+        subs    r0, r0, #32
+
+        // Invoke scheduler. On return, r0 contains the stack pointer for the new thread.
+        ldr     r1, =ar_kernel_yield_isr
+        blx     r1
+
+        // Unstack saved registers.
+        adds    r0, r0, #16
+        ldmia   r0!, {r4-r7}
+        subs    r0, r0, #32
+        mov     r8, r4
+        mov     r9, r5
+        mov     r10, r6
+        mov     r11, r7
+        ldmia   r0!, {r4-r7}
+        adds    r0, r0, #16
+
+        // Update PSP with new stack pointer.
+        msr     psp, r0
+
+        // Exit handler. Using a bx to the special EXC_RETURN values causes the
+        // processor to perform the exception return behavior.
+        ldr     r0, =EXC_RETURN
+        bx      r0
+
+        _FN_END(PendSV_Handler)
+        _FN_SIZE(PendSV_Handler)
+
+        _ALIGN(4)
+
+        _END

src/startup/boot.s

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+        import Reset_Handler
+
+        SECTION .boot:CONST(2)
+        
+        DATA
+
+__boot
+#ifdef DEBUG
+        DCD     0xffffffff
+        DCD     Reset_Handler
+#else
+        DCD     0xffffffff
+        DCD     0xffffffff
+#endif
+
+        END
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

src/startup/crt0.s

@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+;         AREA   Crt0, CODE, READONLY      ; name this block of code
+        SECTION .noinit : CODE
+
+        THUMB
+
+        import SystemInit
+        import init_data_bss
+        import main
+        import CSTACK$$Limit
+        import init_interrupts
+
+        EXTERN __vector_table
+
+
+        REQUIRE __vector_table
+
+#define SCS_BASE            (0xE000E000)                            /*!< System Control Space Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00)                    /*!< System Control Block Base Address */
+#define SCB_VTOR_OFFSET     (0x00000008)
+
+        PUBLIC  Reset_Handler
+        EXPORT  Reset_Handler
+Reset_Handler
+
+        // Mask interrupts
+        cpsid   i
+
+        // Set VTOR register in SCB first thing we do.
+        ldr     r0,=__vector_table
+        ldr     r1,=SCB_BASE
+        str     r0,[r1, #SCB_VTOR_OFFSET]
+
+        // Init the rest of the registers
+        ldr     r2,=0
+        ldr     r3,=0
+        ldr     r4,=0
+        ldr     r5,=0
+        ldr     r6,=0
+        ldr     r7,=0
+        mov     r8,r7
+        mov     r9,r7
+        mov     r10,r7
+        mov     r11,r7
+        mov     r12,r7
+
+        // Initialize the stack pointer
+        ldr     r0,=CSTACK$$Limit
+        mov     r13,r0
+
+        // Call the CMSIS system init routine
+        ldr     r0,=SystemInit
+        blx     r0
+
+        // Init .data and .bss sections
+        ldr     r0,=init_data_bss
+        blx     r0
+
+        // Init interrupts
+        ldr     r0,=init_interrupts
+        blx     r0
+
+        // Unmask interrupts
+        cpsie   i
+
+        // Set argc and argv to NULL before calling main().
+        ldr     r0,=0
+        ldr     r1,=0
+        ldr     r2,=main
+        blx     r2
+
+__done
+        B       __done
+
+
+
+        END
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

src/startup/crt0_gcc.S

@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+//         AREA   Crt0, CODE, READONLY      ; name this block of code
+        .syntax unified
+        .arch armv7-m
+        
+        .section .Reset_Handler, "a"
+        .align 2
+        .globl Reset_Handler
+        .text
+        .thumb
+        .thumb_func
+
+        .extern SystemInit
+        .extern init_data_bss
+        .extern main
+        .extern __StackTop
+        .extern init_interrupts
+
+        .extern __isr_vector
+
+
+#define SCS_BASE            (0xE000E000)                            /*!< System Control Space Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00)                    /*!< System Control Block Base Address */
+#define SCB_VTOR_OFFSET     (0x00000008)
+
+Reset_Handler:
+
+        // Mask interrupts
+        cpsid   i
+
+        // Set VTOR register in SCB first thing we do.
+        ldr     r0,=__isr_vector
+        ldr     r1,=SCB_BASE
+        str     r0,[r1, #SCB_VTOR_OFFSET]
+
+        // Init the rest of the registers
+        ldr     r2,=0
+        ldr     r3,=0
+        ldr     r4,=0
+        ldr     r5,=0
+        ldr     r6,=0
+        ldr     r7,=0
+        mov     r8,r7
+        mov     r9,r7
+        mov     r10,r7
+        mov     r11,r7
+        mov     r12,r7
+
+        // Initialize the stack pointer
+        ldr     r0,=__StackTop
+        mov     r13,r0
+
+        // Call the CMSIS system init routine
+        ldr     r0,=SystemInit
+        blx     r0
+
+        // Init .data and .bss sections
+        ldr     r0,=init_data_bss
+        blx     r0
+
+        // Init interrupts
+        ldr     r0,=init_interrupts
+        blx     r0
+
+        // Unmask interrupts
+        cpsie   i
+
+        // Set argc and argv to NULL before calling main().
+        ldr     r0,=0
+        ldr     r1,=0
+        ldr     r2,=main
+        blx     r2
+
+__done:
+        b       __done
+
+
+
+       .end
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

src/startup/startup.c

@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+#include "fsl_device_registers.h"
+#include "bootloader_core.h"
+
+#if (defined(__ICCARM__))
+#pragma section = ".intvec"
+#pragma section = ".data"
+#pragma section = ".data_init"
+#pragma section = ".bss"
+#pragma section = "CodeRelocate"
+#pragma section = "CodeRelocateRam"
+#pragma section = "USBGlobal"
+#endif
+
+////////////////////////////////////////////////////////////////////////////////
+// Code
+////////////////////////////////////////////////////////////////////////////////
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : init_data_bss
+ * Description   : Make necessary initializations for RAM.
+ * - Copy initialized data from ROM to RAM.
+ * - Clear the zero-initialized data section.
+ * - Copy the vector table from ROM to RAM. This could be an option.
+ *
+ * Tool Chians:
+ *   __GNUC__   : GCC
+ *   __CC_ARM   : KEIL
+ *   __ICCARM__ : IAR
+ *
+ *END**************************************************************************/
+void init_data_bss(void)
+{
+/* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */
+#if defined(__CC_ARM)
+    extern uint32_t Image$$VECTOR_ROM$$Base[];
+    extern uint32_t Image$$VECTOR_RAM$$Base[];
+    extern uint32_t Image$$RW_m_data$$Base[];
+
+#define __VECTOR_TABLE Image$$VECTOR_ROM$$Base
+#define __VECTOR_RAM Image$$VECTOR_RAM$$Base
+#define __RAM_VECTOR_TABLE_SIZE (((uint32_t)Image$$RW_m_data$$Base - (uint32_t)Image$$VECTOR_RAM$$Base))
+#elif defined(__ICCARM__)
+    extern uint32_t __RAM_VECTOR_TABLE_SIZE[];
+    extern uint32_t __VECTOR_TABLE[];
+    extern uint32_t __VECTOR_RAM[];
+#elif defined(__GNUC__)
+    extern uint32_t __VECTOR_TABLE[];
+#endif
+
+#if (defined(__ICCARM__))
+    SCB->VTOR = (uint32_t)__section_begin(".intvec");
+#else
+    SCB->VTOR = (uint32_t)__VECTOR_TABLE;
+#endif
+
+#if !defined(__CC_ARM)
+
+    /* Declare pointers for various data sections. These pointers
+     * are initialized using values pulled in from the linker file */
+    uint8_t *data_ram, *data_rom, *data_rom_end;
+    uint8_t *bss_start, *bss_end;
+    uint32_t n;
+
+// Get the addresses for the .data section (initialized data section)
+#if defined(__GNUC__)
+    extern uint32_t __DATA_ROM[];
+    extern uint32_t __DATA_RAM[];
+    extern char __DATA_END[];
+    data_ram = (uint8_t *)__DATA_RAM;
+    data_rom = (uint8_t *)__DATA_ROM;
+    data_rom_end = (uint8_t *)__DATA_END; // This is actually a RAM address in CodeWarrior
+    n = data_rom_end - data_rom;
+#elif(defined(__ICCARM__))
+    data_ram = __section_begin(".data");
+    data_rom = __section_begin(".data_init");
+    data_rom_end = __section_end(".data_init");
+    n = data_rom_end - data_rom;
+#endif
+
+    if (data_ram != data_rom)
+    {
+        // Copy initialized data from ROM to RAM
+        while (n)
+        {
+            *data_ram++ = *data_rom++;
+            n--;
+        }
+    }
+
+// Get the addresses for the .bss section (zero-initialized data)
+#if defined(__GNUC__)
+    extern char __START_BSS[];
+    extern char __END_BSS[];
+    bss_start = (uint8_t *)__START_BSS;
+    bss_end = (uint8_t *)__END_BSS;
+#elif(defined(__ICCARM__))
+    bss_start = __section_begin(".bss");
+    bss_end = __section_end(".bss");
+#endif
+
+    // Clear the zero-initialized data section
+    n = bss_end - bss_start;
+    while (n)
+    {
+        *bss_start++ = 0;
+        n--;
+    }
+
+#if defined(USB_STACK_BM)
+// Get the addresses for the USBGlobal section (zero-initialized data)
+#if (defined(__ICCARM__))
+    uint8_t *usbGlobal_start = __section_begin("USBGlobal");
+    uint8_t *usbGlobal_end = __section_end("USBGlobal");
+#elif(defined(__GNUC__))
+    extern uint8_t __START_USBGLOBAL[];
+    extern uint8_t __END_USBGLOBAL[];
+    uint8_t *usbGlobal_start = (uint8_t *)__START_USBGLOBAL;
+    uint8_t *usbGlobal_end = (uint8_t *)__END_USBGLOBAL;
+#endif
+
+    // Clear the zero-initialized data section
+    n = usbGlobal_end - usbGlobal_start;
+    while (n)
+    {
+        *usbGlobal_start++ = 0;
+        n--;
+    }
+#endif // #if defined(USB_STACK_BM)
+
+/* Get addresses for any code sections that need to be copied from ROM to RAM.
+ * The IAR tools have a predefined keyword that can be used to mark individual
+ * functions for execution from RAM. Add "__ramfunc" before the return type in
+ * the function prototype for any routines you need to execute from RAM instead
+ * of ROM. ex: __ramfunc void foo(void);
+ */
+#if (defined(__ICCARM__))
+    uint8_t *code_relocate_ram = __section_begin("CodeRelocateRam");
+    uint8_t *code_relocate = __section_begin("CodeRelocate");
+    uint8_t *code_relocate_end = __section_end("CodeRelocate");
+
+    // Copy functions from ROM to RAM
+    n = code_relocate_end - code_relocate;
+    while (n)
+    {
+        *code_relocate_ram++ = *code_relocate++;
+        n--;
+    }
+#endif
+#endif /* !__CC_ARM && !__ICCARM__*/
+}
+
+void init_interrupts(void)
+{
+    // Clear any IRQs that may be enabled, we only want the IRQs we enable to be active
+    NVIC_ClearEnabledIRQs();
+
+    // Clear any pending IRQs that may have been set
+    NVIC_ClearAllPendingIRQs();
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

src/startup/startup.h

@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * File:    startup.h
+ * Purpose: Initialize memory and zero out zero regions. Move necessary code
+ *          to RAM.
+ *
+ * Notes:
+ */
+
+#ifndef _STARTUP_H_
+#define _STARTUP_H_
+
+/********************************************************************/
+
+void start(void);
+void init_data_bss(void);
+
+/********************************************************************/
+
+#endif /* _STARTUP_H_ */