Add KBOOT.
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László Monda
251
apps/flash_driver_api/MKL43Z4/src/startup/iar/startup_MKL43Z4.s
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251
apps/flash_driver_api/MKL43Z4/src/startup/iar/startup_MKL43Z4.s
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; ---------------------------------------------------------------------------------------
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; @file: startup_MKL43Z4.s
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; @purpose: CMSIS Cortex-M0P Core Device Startup File
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; MKL43Z4
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; @version: 1.5
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; @date: 2014-9-5
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; @build: b150130
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; ---------------------------------------------------------------------------------------
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;
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; Copyright (c) 1997 - 2015 , Freescale Semiconductor, Inc.
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without modification,
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; are permitted provided that the following conditions are met:
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;
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; o Redistributions of source code must retain the above copyright notice, this list
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; of conditions and the following disclaimer.
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;
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; o Redistributions in binary form must reproduce the above copyright notice, this
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; list of conditions and the following disclaimer in the documentation and/or
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; other materials provided with the distribution.
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;
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; o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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; contributors may be used to endorse or promote products derived from this
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; software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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; ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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EXTERN init_data_bss
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler ;NMI Handler
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DCD HardFault_Handler ;Hard Fault Handler
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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__vector_table_0x1c
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD SVC_Handler ;SVCall Handler
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD PendSV_Handler ;PendSV Handler
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DCD SysTick_Handler ;SysTick Handler
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;External Interrupts
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DCD DMA0_IRQHandler ;DMA channel 0 transfer complete
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DCD DMA1_IRQHandler ;DMA channel 1 transfer complete
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DCD DMA2_IRQHandler ;DMA channel 2 transfer complete
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DCD DMA3_IRQHandler ;DMA channel 3 transfer complete
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DCD Reserved20_IRQHandler ;Reserved interrupt
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DCD FTFA_IRQHandler ;Command complete and read collision
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DCD PMC_IRQHandler ;Low-voltage detect, low-voltage warning
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DCD LLWU_IRQHandler ;Low leakage wakeup
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DCD I2C0_IRQHandler ;I2C0 interrupt
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DCD I2C1_IRQHandler ;I2C1 interrupt
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DCD SPI0_IRQHandler ;SPI0 single interrupt vector for all sources
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DCD SPI1_IRQHandler ;SPI1 single interrupt vector for all sources
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DCD LPUART0_IRQHandler ;LPUART0 status and error
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DCD LPUART1_IRQHandler ;LPUART1 status and error
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DCD UART2_FLEXIO_IRQHandler ;UART2 or FLEXIO
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DCD ADC0_IRQHandler ;ADC0 interrupt
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DCD CMP0_IRQHandler ;CMP0 interrupt
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DCD TPM0_IRQHandler ;TPM0 single interrupt vector for all sources
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DCD TPM1_IRQHandler ;TPM1 single interrupt vector for all sources
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DCD TPM2_IRQHandler ;TPM2 single interrupt vector for all sources
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DCD RTC_IRQHandler ;RTC alarm
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DCD RTC_Seconds_IRQHandler ;RTC seconds
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DCD PIT_IRQHandler ;PIT interrupt
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DCD I2S0_IRQHandler ;I2S0 interrupt
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DCD USB0_IRQHandler ;USB0 interrupt
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DCD DAC0_IRQHandler ;DAC0 interrupt
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DCD Reserved42_IRQHandler ;Reserved interrupt
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DCD Reserved43_IRQHandler ;Reserved interrupt
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DCD LPTMR0_IRQHandler ;LPTMR0 interrupt
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DCD LCD_IRQHandler ;LCD interrupt
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DCD PORTA_IRQHandler ;PORTA Pin detect
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DCD PORTCD_IRQHandler ;Single interrupt vector for PORTC; PORTD Pin detect
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__Vectors_End
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SECTION FlashConfig:CODE
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__FlashConfig
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DCD 0xFFFFFFFF
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DCD 0xFFFFFFFF
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DCD 0xFFFFFFFF
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DCD 0xFFFF3FFE
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__FlashConfig_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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CPSID I ; Mask interrupts
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =init_data_bss
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BLX R0
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CPSIE I ; Unmask interrupts
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B .
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B .
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B .
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B .
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B .
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PUBWEAK DMA0_IRQHandler
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PUBWEAK DMA1_IRQHandler
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PUBWEAK DMA2_IRQHandler
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PUBWEAK DMA3_IRQHandler
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PUBWEAK Reserved20_IRQHandler
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PUBWEAK FTFA_IRQHandler
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PUBWEAK PMC_IRQHandler
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PUBWEAK LLWU_IRQHandler
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PUBWEAK I2C0_IRQHandler
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PUBWEAK I2C1_IRQHandler
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PUBWEAK SPI0_IRQHandler
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PUBWEAK SPI1_IRQHandler
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PUBWEAK LPUART0_IRQHandler
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PUBWEAK LPUART1_IRQHandler
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PUBWEAK UART2_FLEXIO_IRQHandler
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PUBWEAK ADC0_IRQHandler
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PUBWEAK CMP0_IRQHandler
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PUBWEAK TPM0_IRQHandler
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PUBWEAK TPM1_IRQHandler
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PUBWEAK TPM2_IRQHandler
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PUBWEAK RTC_IRQHandler
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PUBWEAK RTC_Seconds_IRQHandler
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PUBWEAK PIT_IRQHandler
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PUBWEAK I2S0_IRQHandler
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PUBWEAK USB0_IRQHandler
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PUBWEAK DAC0_IRQHandler
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PUBWEAK Reserved42_IRQHandler
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PUBWEAK Reserved43_IRQHandler
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PUBWEAK LPTMR0_IRQHandler
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PUBWEAK LCD_IRQHandler
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PUBWEAK PORTA_IRQHandler
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PUBWEAK PORTCD_IRQHandler
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PUBWEAK DefaultISR
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SECTION .text:CODE:REORDER:NOROOT(2)
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DMA0_IRQHandler
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DMA1_IRQHandler
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DMA2_IRQHandler
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DMA3_IRQHandler
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Reserved20_IRQHandler
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FTFA_IRQHandler
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PMC_IRQHandler
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LLWU_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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SPI0_IRQHandler
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SPI1_IRQHandler
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LPUART0_IRQHandler
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LPUART1_IRQHandler
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UART2_FLEXIO_IRQHandler
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ADC0_IRQHandler
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CMP0_IRQHandler
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TPM0_IRQHandler
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TPM1_IRQHandler
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TPM2_IRQHandler
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RTC_IRQHandler
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RTC_Seconds_IRQHandler
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PIT_IRQHandler
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I2S0_IRQHandler
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USB0_IRQHandler
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DAC0_IRQHandler
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Reserved42_IRQHandler
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Reserved43_IRQHandler
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LPTMR0_IRQHandler
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LCD_IRQHandler
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PORTA_IRQHandler
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PORTCD_IRQHandler
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DefaultISR
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LDR R0, =DefaultISR
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BX R0
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END
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