Add KBOOT.

apps/bus_pal/MK65F18/buspal.eww

@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+<workspace>
+<batchBuild><batchDefinition><name>all</name><member><project>buspal_tower</project><configuration>Release</configuration></member><member><project>buspal_tower</project><configuration>Debug</configuration></member></batchDefinition><batchDefinition><name>Release</name><member><project>buspal_tower</project><configuration>Release</configuration></member></batchDefinition><batchDefinition><name>Debug</name><member><project>buspal_tower</project><configuration>Debug</configuration></member></batchDefinition></batchBuild>
+<project><path>$WS_DIR$/iar/buspal_tower/buspal_tower.ewp</path></project></workspace>

apps/bus_pal/MK65F18/src/bus_pal_hardware.h

@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#if !defined(__BUS_PAL_HARDWARE_H__)
+#define __BUS_PAL_HARDWARE_H__
+
+#include "dspi/fsl_dspi.h"
+#include "i2c/fsl_i2c.h"
+#include "bl_peripheral.h"
+
+/*!
+ * @brief user config from host for i2c
+ */
+typedef struct _i2c_user_config
+{
+    uint8_t slaveAddress;
+    uint16_t baudRate_kbps;
+} i2c_user_config_t;
+
+/*!
+ * @brief user config from host for spi
+ */
+typedef struct _dspi_user_config
+{
+    dspi_clock_polarity_t polarity;   /*!< Clock polarity */
+    dspi_clock_phase_t phase;         /*!< Clock phase */
+    dspi_shift_direction_t direction; /*!< MSB or LSB */
+    uint32_t baudRate_Bps;            /*!< Baud Rate for SPI in Hz */
+    uint32_t clock_Hz;
+} dspi_user_config_t;
+
+/*!
+ * @brief hardware initialization
+ */
+void init_hardware(void);
+
+//! @brief sending host bytes command process
+void write_bytes_to_host(uint8_t *src, uint32_t length);
+
+//! @brief receiving host start command process
+void host_start_command_rx(uint8_t *dest, uint32_t length);
+
+//! @brief receiving host stop command process
+void host_stop_command_rx(void);
+
+//! @brief receiving host get bytes command process
+uint32_t get_bytes_received_from_host(void);
+
+//! @brief spi config speed process
+void configure_spi_speed(uint32_t speedkhz);
+
+//! @brief spi config settings process
+void configure_spi_settings(dspi_clock_polarity_t polarity, dspi_clock_phase_t phase, dspi_shift_direction_t direction);
+
+//! @brief i2c config address process
+void configure_i2c_address(uint8_t address);
+
+//! @brief i2c config speed process
+void configure_i2c_speed(uint32_t speedkhz);
+
+//! @brief spi send data process
+void send_spi_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief spi receiving data process
+void receive_spi_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief flexCAN config speed process
+void configure_can_speed(uint32_t speed);
+
+//! @brief flexCAN config txid
+void configure_can_txid(uint32_t txid);
+
+//! @brief flexCAN config rxid
+void configure_can_rxid(uint32_t rxid);
+
+//! @brief flexCAN sending data process
+void send_can_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief flexCAN receiving data process
+void receive_can_data(uint8_t data, uint32_t instance);
+
+//! @brief flexCAN read data process
+void read_can_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief flexCAN reset buffer process
+void reset_can_buffer(void);
+
+//! @brief i2c sending data process
+status_t send_i2c_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief i2c receiving data process
+status_t receive_i2c_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief GPIO config processing
+void configure_gpio(uint8_t port, uint8_t pinNum, uint8_t muxVal);
+
+//! @brief GPIO set up function
+void set_gpio(uint8_t port, uint8_t pinNum, uint8_t level);
+
+//! @brief fpga clock set function
+void set_fpga_clock(uint32_t clock);
+
+bool scuart_poll_for_activity();
+bool usb_hid_poll_for_activity(const peripheral_descriptor_t *self);
+status_t usb_hid_packet_init(const peripheral_descriptor_t *self);
+status_t usb_hid_packet_read(const peripheral_descriptor_t *self,
+                             uint8_t **packet,
+                             uint32_t *packetLength,
+                             packet_type_t packetType);
+status_t usb_hid_packet_write(const peripheral_descriptor_t *self,
+                              const uint8_t *packet,
+                              uint32_t byteCount,
+                              packet_type_t packetType);
+#endif // __BUS_PAL_HARDWARE_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

apps/bus_pal/MK65F18/src/command.h

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2013, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _command_h
+#define _command_h
+
+//! @addtogroup command
+//! @{
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+//! @brief Command state machine states.
+enum _command_state
+{
+    kCommandState_CommandPhase,
+    kCommandState_DataPhase,
+    kCommandState_DataPhaseRead,
+    kCommandState_DataPhaseWrite
+};
+
+typedef enum _buspal_state
+{
+    kBuspal_Idle,
+    kBuspal_I2c,
+    kBuspal_Spi,
+    kBuspal_FlexCAN,
+    kBuspal_MsCAN
+} buspal_state_t;
+
+typedef struct ConfigI2cCmdPacket
+{
+    command_packet_t commandPacket; //!< header
+    uint32_t address;               //!< Parameter 0: i2c slave address.
+    uint32_t speed;                 //!< Parameter 1: i2c speed in kHz
+} config_i2c_cmd_packet_t;
+
+//! @brief Format of command handler entry.
+typedef struct CommandHandlerEntry
+{
+    void (*handleCommand)(uint8_t *packet, uint32_t packetLength);
+    status_t (*handleData)(bool *hasMoreData);
+} command_handler_entry_t;
+
+//! @brief Command processor data format.
+typedef struct CommandProcessorData
+{
+    int32_t state;         //!< Current state machine state
+    uint8_t *packet;       //!< Pointer to packet in process
+    uint32_t packetLength; //!< Length of packet in process
+    struct DataPhase
+    {
+        uint8_t *data;               //!< Data for data phase
+        uint32_t count;              //!< Remaining count to produce/consume
+        uint32_t address;            //!< Address for data phase
+        uint32_t dataBytesAvailable; //!< Number of bytes available at data pointer
+        uint8_t commandTag;          //!< Tag of command running data phase
+        uint8_t option;              //!< option for special command
+    } dataPhase;
+    const command_handler_entry_t *handlerEntry; //! Pointer to handler table entry for packet in process
+} command_processor_data_t;
+
+//! @brief Interface to command processor operations.
+typedef struct CommandInterface
+{
+    status_t (*init)(void);
+    status_t (*pump)(void);
+    const command_handler_entry_t *handlerTable;
+    command_processor_data_t *stateData;
+} command_interface_t;
+
+////////////////////////////////////////////////////////////////////////////////
+// Externals
+////////////////////////////////////////////////////////////////////////////////
+
+//! @brief Default command interface.
+extern command_interface_t g_commandInterface;
+
+////////////////////////////////////////////////////////////////////////////////
+// Prototypes
+////////////////////////////////////////////////////////////////////////////////
+
+#if defined(__cplusplus)
+extern "C" {
+#endif // __cplusplus
+
+//! @brief Initialize the command processor component.
+status_t bootloader_command_init(void);
+
+//! @brief Pump the command state machine.
+//!
+//! Executes one command or data phase transaction.
+status_t bootloader_command_pump(void);
+
+#if defined(__cplusplus)
+}
+#endif // __cplusplus
+
+//! @}
+
+#endif // _command.h_
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

apps/bus_pal/MKL25Z4/buspal.eww

@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+<workspace>
+<batchBuild><batchDefinition><name>all</name><member><project>buspal_freedom</project><configuration>Release</configuration></member><member><project>buspal_freedom</project><configuration>Debug</configuration></member></batchDefinition><batchDefinition><name>Release</name><member><project>buspal_freedom</project><configuration>Release</configuration></member></batchDefinition><batchDefinition><name>Debug</name><member><project>buspal_freedom</project><configuration>Debug</configuration></member></batchDefinition></batchBuild>
+<project><path>$WS_DIR$/iar/buspal_freedom/buspal_freedom.ewp</path></project></workspace>

apps/bus_pal/MKL25Z4/src/bus_pal_hardware.h

@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#if !defined(__BUS_PAL_HARDWARE_H__)
+#define __BUS_PAL_HARDWARE_H__
+
+#include "spi/fsl_spi.h"
+#include "i2c/fsl_i2c.h"
+
+/*!
+ * @brief user config from host for i2c
+ */
+typedef struct _i2c_user_config
+{
+    uint8_t slaveAddress;
+    uint16_t baudRate_kbps;
+} i2c_user_config_t;
+
+/*!
+ * @brief user config from host for spi
+ */
+typedef struct _spi_user_config
+{
+    spi_clock_polarity_t polarity;   /*!< Clock polarity */
+    spi_clock_phase_t phase;         /*!< Clock phase */
+    spi_shift_direction_t direction; /*!< MSB or LSB */
+    uint32_t baudRate_Bps;           /*!< Baud Rate for SPI in Hz */
+    uint32_t clock_Hz;
+} spi_user_config_t;
+
+/*!
+ * @brief hardware initialization
+ */
+void init_hardware(void);
+
+//! @brief sending host bytes command process
+void write_bytes_to_host(uint8_t *src, uint32_t length);
+
+//! @brief receiving host start command process
+void host_start_command_rx(uint8_t *dest, uint32_t length);
+
+//! @brief receiving host stop command process
+void host_stop_command_rx(void);
+
+//! @brief receiving host get bytes command process
+uint32_t get_bytes_received_from_host(void);
+
+//! @brief spi config speed process
+void configure_spi_speed(uint32_t speedkhz);
+
+//! @brief spi config settings process
+void configure_spi_settings(spi_clock_polarity_t polarity, spi_clock_phase_t phase, spi_shift_direction_t direction);
+
+//! @brief i2c config address process
+void configure_i2c_address(uint8_t address);
+
+//! @brief i2c config speed process
+void configure_i2c_speed(uint32_t speedkhz);
+
+//! @brief spi send data process
+void send_spi_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief spi receiving data process
+void receive_spi_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief i2c sending data process
+status_t send_i2c_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief i2c receiving data process
+status_t receive_i2c_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief GPIO config processing
+void configure_gpio(uint8_t port, uint8_t pinNum, uint8_t muxVal);
+
+//! @brief GPIO set up function
+void set_gpio(uint8_t port, uint8_t pinNum, uint8_t level);
+
+//! @brief fpga clock set function
+void set_fpga_clock(uint32_t clock);
+
+#endif // __BUS_PAL_HARDWARE_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

apps/bus_pal/MKV46F16/buspal.eww

@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+<workspace>
+<batchBuild><batchDefinition><name>all</name><member><project>buspal_tower</project><configuration>Release</configuration></member><member><project>buspal_tower</project><configuration>Debug</configuration></member></batchDefinition><batchDefinition><name>Release</name><member><project>buspal_tower</project><configuration>Release</configuration></member></batchDefinition><batchDefinition><name>Debug</name><member><project>buspal_tower</project><configuration>Debug</configuration></member></batchDefinition></batchBuild>
+<project><path>$WS_DIR$/iar/buspal_tower/buspal_tower.ewp</path></project></workspace>

apps/bus_pal/MKV46F16/src/bus_pal_hardware.h

@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#if !defined(__BUS_PAL_HARDWARE_H__)
+#define __BUS_PAL_HARDWARE_H__
+
+#include "dspi/fsl_dspi.h"
+#include "i2c/fsl_i2c.h"
+
+/*!
+ * @brief user config from host for i2c
+ */
+typedef struct _i2c_user_config
+{
+    uint8_t slaveAddress;
+    uint16_t baudRate_kbps;
+} i2c_user_config_t;
+
+/*!
+ * @brief user config from host for spi
+ */
+typedef struct _dspi_user_config
+{
+    dspi_clock_polarity_t polarity;   /*!< Clock polarity */
+    dspi_clock_phase_t phase;         /*!< Clock phase */
+    dspi_shift_direction_t direction; /*!< MSB or LSB */
+    uint32_t baudRate_Bps;            /*!< Baud Rate for SPI in Hz */
+    uint32_t clock_Hz;
+} dspi_user_config_t;
+
+/*!
+ * @brief hardware initialization
+ */
+void init_hardware(void);
+
+//! @brief sending host bytes command process
+void write_bytes_to_host(uint8_t *src, uint32_t length);
+
+//! @brief receiving host start command process
+void host_start_command_rx(uint8_t *dest, uint32_t length);
+
+//! @brief receiving host stop command process
+void host_stop_command_rx(void);
+
+//! @brief receiving host get bytes command process
+uint32_t get_bytes_received_from_host(void);
+
+//! @brief spi config speed process
+void configure_spi_speed(uint32_t speedkhz);
+
+//! @brief spi config settings process
+void configure_spi_settings(dspi_clock_polarity_t polarity, dspi_clock_phase_t phase, dspi_shift_direction_t direction);
+
+//! @brief i2c config address process
+void configure_i2c_address(uint8_t address);
+
+//! @brief i2c config speed process
+void configure_i2c_speed(uint32_t speedkhz);
+
+//! @brief spi send data process
+void send_spi_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief spi receiving data process
+void receive_spi_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief flexCAN config speed process
+void configure_can_speed(uint32_t speed);
+
+//! @brief flexCAN config txid
+void configure_can_txid(uint32_t txid);
+
+//! @brief flexCAN config rxid
+void configure_can_rxid(uint32_t rxid);
+
+//! @brief flexCAN sending data process
+void send_can_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief flexCAN receiving data process
+void receive_can_data(uint8_t data, uint32_t instance);
+
+//! @brief flexCAN read data process
+void read_can_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief flexCAN reset buffer process
+void reset_can_buffer(void);
+
+//! @brief i2c sending data process
+status_t send_i2c_data(uint8_t *src, uint32_t writeLength);
+
+//! @brief i2c receiving data process
+status_t receive_i2c_data(uint8_t *dest, uint32_t readLength);
+
+//! @brief GPIO config processing
+void configure_gpio(uint8_t port, uint8_t pinNum, uint8_t muxVal);
+
+//! @brief GPIO set up function
+void set_gpio(uint8_t port, uint8_t pinNum, uint8_t level);
+
+//! @brief fpga clock set function
+void set_fpga_clock(uint32_t clock);
+
+#endif // __BUS_PAL_HARDWARE_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

apps/bus_pal/linker/iar/bus_pal.icf

@@ -0,0 +1,41 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__     = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0001ffff;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__      = 0x800;
+define symbol __ICFEDIT_size_heap__        = 0;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __region_RAM2_start__        = 0x20000000;
+define symbol __region_RAM2_end__          = 0x20002fff;
+
+define symbol __FlashConfig_start__        = 0x00000400;
+define symbol __FlashConfig_end__          = 0x0000040f;
+
+define exported symbol __VECTOR_TABLE      = __ICFEDIT_intvec_start__;
+define exported symbol __VECTOR_RAM        = __ICFEDIT_region_RAM_start__;
+define          symbol __VECTOR_TABLE_END  = __FlashConfig_start__;
+
+define memory mem with size = 4G;
+define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];
+define region ROM_region = mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from (__ICFEDIT_region_RAM_start__+__VECTOR_TABLE_END) to __ICFEDIT_region_RAM_end__]
+                         | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP   with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite, section .textrw };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in FlashConfig_region                   { section FlashConfig };
+place in ROM_region                           { readonly };
+place in RAM_region                           { readwrite, block CSTACK, block HEAP };

apps/bus_pal/src/buspal_config.h

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __BUSPAL_CONFIG_H__
+#define __BUSPAL_CONFIG_H__
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+//
+// Bootloader configuration options
+//
+
+//! @name Peripheral configuration macros
+//@{
+
+#if !defined(BL_CONFIG_UART)
+#define BL_CONFIG_UART (1)
+#endif
+
+#if !defined(BL_CONFIG_SCUART)
+#define BL_CONFIG_SCUART (1)
+#endif
+
+#if !defined(BL_CONFIG_LPUART)
+#define BL_CONFIG_LPUART (1)
+#endif
+
+#if !defined(BL_CONFIG_CAN)
+#define BL_CONFIG_CAN (1)
+#endif
+
+#if !defined(BL_CONFIG_SPI)
+#define BL_CONFIG_SPI (1)
+#endif
+
+#if !defined(BL_CONFIG_USB_HID)
+#define BL_CONFIG_USB_HID (1)
+#endif
+#if !defined(BL_CONFIG_USB_MSC)
+#define BL_CONFIG_USB_MSC (0)
+#endif
+
+#if !defined(BL_CONFIG_HS_USB_HID)
+#define BL_CONFIG_HS_USB_HID (0) // For TOWER and FRDM boards
+#endif
+#if !defined(BL_CONFIG_HS_USB_MSC)
+#define BL_CONFIG_HS_USB_MSC (0) // For TOWER and FRDM boards
+#endif
+
+//@}
+
+#endif // __BUSPAL_CONFIG_H__
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////

apps/bus_pal/src/command_handle.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __command_handle_H__
+#define __command_handle_H__
+
+#include <stdio.h>
+
+////////////////////////////////////////////////////////////////////////////////
+// Definitions
+////////////////////////////////////////////////////////////////////////////////
+
+// @brief Handle the commands receied from host
+void handle_command(void);
+
+#endif /* __command_handle_H__ */

apps/bus_pal/src/fpga_clock_registers.h

@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#if !defined(__FPGA_CLOCK_REGISTERS_H__)
+#define __FPGA_CLOCK_REGISTERS_H__
+
+#define CY22393_ADDR 0x69
+
+// REG
+#define CY22393_REG_CLKA_DIVIDE (0x08) // divsel:0
+#define CY22393_REG_CLKB_DIVIDE (0x0A) // divsel:0
+#define CY22393_REG_CLKC_DIVIDE (0x0C) // CLKC
+#define CY22393_REG_CLKD_DIVIDE (0x0D) // CLKD
+
+#define CY22393_REG_SOURCE 0x0E
+
+#define CY22393_REG_AC 0x0F
+#define CY22393_REG_DC 0x10
+
+#define CY22393_REG_CLKA_DIV 0x08
+#define CY22393_REG_PLL3Q 0x14
+#define CY22393_REG_PLL3P 0x15
+#define CY22393_REG_PLL3E 0x16
+
+// This is the low register value of the lower bank
+#define CY22393_REG_LOW 0x08
+// This is the high register value of the high bank
+#define CY22393_REG_HIGH 0x17
+
+#define CY22393_AC 0x55
+#define CY22393_DC 0x55
+
+#define CY22393_DIVIDE_OFF 0 // close clk ouput
+
+// Maximum post div value when using VCO frequency above 333 MHZ
+#define CY22393_POSTDIV_MAX_VAL 31
+
+// Reference clock to cypress chip
+#define CY22393_REF_CLK 24000000
+
+// This is the minimum value that Reference divided by Q can be equal to
+#define CY22393_MIN_REF_DIV_Q 250000
+
+// Max clock frequency the chip supports, for CY22393 it is 200Mhz
+#define CY22393_MAX_OUTPUT_CLK 200000000
+
+// Max VCO clock frequency the chip supports, for CY22393 it is 375Mhz
+#define CY22393_MAX_VCO_CLK 375000000
+
+#endif // __FPGA_CLOCK_REGISTERS_H__

apps/bus_pal/src/main.c

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "command_handle.h"
+#include "bus_pal_hardware.h"
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : main
+ * Description   : bus pal main function
+ *
+ *END**************************************************************************/
+int main()
+{
+    init_hardware();
+
+    while (1)
+    {
+        handle_command();
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// EOF
+////////////////////////////////////////////////////////////////////////////////