qspi.h
/*
* Copyright (c) 2013-2016, Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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*/
#ifndef __QSPI_H__
#define __QSPI_H__
#include "memory/memory.h"
#include "bootloader_common.h"
// Definitions
#define QSPI_LUT_MAX_ENTRIES 64
#define QSPI_PRE_CMD_CNT 4
#define QSPI_FEATURE_ENABLE 1
#define QSPI_VERSION_NAME 'Q'
enum __qspi_config_block_tags
{
kQspiConfigTag = FOUR_CHAR_CODE('k', 'q', 'c', 'f'),
kQspiVersionTag = FOUR_CHAR_CODE(0, 2, 1, 'Q'),
};
typedef enum _qspiflash_mode_option
{
kQspiFlashMode_Serial = 0,
kQspiFlashMode_Parallel = 1
} qspiflash_mode_option_t;
typedef enum _qspiflash_pad
{
kQspiFlashPad_Single = 0,
kQspiFlashPad_Dual = 1,
kQspiFlashPad_Quad = 2,
kQspiFlashPad_Octal = 3
} qspiflash_pad_t;
typedef enum _qspi_serial_clock_freq
{
kQspiSerialClockFreq_Low = 0,
kQspiSerialClockFreq_Mid = 1,
kQspiSerialClockFreq_High = 2
} qspi_serial_clock_freq_t;
typedef enum _qspiflash_property
{
kQspiFlashProperty_InitStatus = 0,
kQspiFlaghProperty_StartAddress = 1,
kQspiFlashProperty_TotalFlashSizeInKBytes = 2,
kQspiFlashProperty_PageSize = 3,
kQspiFlashProperty_SectorSize = 4,
kQspiFlashProperty_BlockSize = 5,
kQspiFlashProperty_TotalFlashSize = 0x10,
} qspiflash_property_t;
typedef enum _qspi_endianness
{
kQspiEndianess_64BE = 0U,
kQspiEndianess_32LE = 1U,
kQspiEndianess_32BE = 2U,
kQspiEndianess_64LE = 3U,
} qspi_endianess_t;
typedef enum _qspi_port_enable
{
kQspiPort_EnablePortA = 0U,
kQspiPort_EnableBothPorts = 1,
} qspi_port_enable_t;
typedef enum _qspi_ahb_data_transfer_size
{
kQspiAHBDataTransferSize_64Bytes = 8U,
kQspiAHBDataTransferSize_256Bytes = 32U,
kQspiAHBDataTransferSize_512Bytes = 64U,
} qspi_ahb_data_transfer_size_t;
typedef enum _qspiflash_status
{
kStatus_QspiFlashSizeError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 0),
kStatus_QspiFlashAlignmentError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 1),
kStatus_QspiFlashAddressError = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 2),
kStatus_QspiFlashCommandFailure = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 3),
kStatus_QspiFlashUnknownProperty = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 4),
kStatus_QspiNotConfigured = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 5),
kStatus_QspiCommandNotSupported = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 6),
kStatus_QspiCommandTimeout = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 7),
kStatus_QspiWriteFailure = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 8),
// commands in LUT
kStatusQspiModuleBusy = MAKE_STATUS(kStatusGroup_QuadSPIDriver, 9),
} qspiflash_status_t;
typedef struct __sflash_configuration_parameter
{
uint32_t tag;
standard_version_t version;
uint32_t lengthInBytes;
uint32_t dqs_loopback;
uint32_t data_hold_time;
uint32_t reserved0[2];
uint32_t device_mode_config_en;
uint32_t device_cmd;
uint32_t write_cmd_ipcr;
uint32_t word_addressable;
uint32_t cs_hold_time;
uint32_t cs_setup_time;
uint32_t sflash_A1_size;
uint32_t sflash_A2_size;
uint32_t sflash_B1_size;
uint32_t sflash_B2_size;
uint32_t sclk_freq;
uint32_t busy_bit_offset;
uint32_t sflash_type;
uint32_t sflash_port;
uint32_t ddr_mode_enable;
uint32_t dqs_enable;
uint32_t parallel_mode_enable;
uint32_t portA_cs1;
uint32_t portB_cs1;
uint32_t fsphs;
uint32_t fsdly;
uint32_t ddrsmp;
uint32_t
look_up_table[QSPI_LUT_MAX_ENTRIES];
uint32_t column_address_space;
uint32_t config_cmd_en;
uint32_t config_cmds[QSPI_PRE_CMD_CNT];
uint32_t config_cmds_args[QSPI_PRE_CMD_CNT];
uint32_t differential_clock_pin_enable;
uint32_t flash_CK2_clock_pin_enable;
uint32_t dqs_inverse_sel;
uint32_t dqs_latency_enable;
uint32_t dqs_loopback_internal;
uint32_t dqs_phase_sel;
uint32_t dqs_fa_delay_chain_sel;
uint32_t dqs_fb_delay_chain_sel;
uint32_t reserved1[2];
uint32_t pagesize;
uint32_t sectorsize;
uint32_t timeout_milliseconds;
uint32_t ips_command_second_divider;
uint32_t need_multi_phases;
uint32_t is_spansion_hyperflash;
uint32_t pre_read_status_cmd_address_offset;
uint32_t pre_unlock_cmd_address_offset;
uint32_t unlock_cmd_address_offset;
uint32_t pre_program_cmd_address_offset;
uint32_t pre_erase_cmd_address_offset;
uint32_t erase_all_cmd_address_offset;
uint32_t reserved2[3];
} qspi_config_t, *SFLASH_CONFIGURATION_PARAM_PTR;
// API
#if defined(__cplusplus)
extern "C" {
#endif
status_t quadspi_get_property(uint32_t whichProperty, uint32_t *value);
status_t quadspi_page_program(uint32_t dst_addr, const uint32_t *src, uint32_t lengthInBytes);
status_t quadspi_init(qspi_config_t *config_base);
bool is_quadspi_configured(void);
extern status_t quadspi_iomux_configuration(qspi_config_t *config_base);
extern void quadspi_serial_clock_configure(qspi_serial_clock_freq_t freq);
status_t quadspi_erase_all(void);
status_t quadspi_erase_sector(uint32_t address);
status_t quadspi_cache_clear(void);
#if defined(__cplusplus)
}
#endif // #ifndef __QSPI_H__
#endif
// EOF
qspi_config_t::pagesize
uint32_t pagesize
page Size of Serial Flash
Definition: qspi.h:199
kQspiFlashPad_Octal
Octal-pad spi flash.
Definition: qspi.h:73
kStatus_QspiFlashAddressError
Error code which represents that the address is invalid.
Definition: qspi.h:129
qspi_config_t::pre_erase_cmd_address_offset
uint32_t pre_erase_cmd_address_offset
Address for PreErase command.
Definition: qspi.h:211
quadspi_get_property
status_t quadspi_get_property(uint32_t whichProperty, uint32_t *value)
Get Property from QSPI driver.
Definition: qspi.c:346
kQspiSerialClockFreq_Mid
QuadSPI module works at mid frequency.
Definition: qspi.h:80
kQspiPort_EnableBothPorts
Enable Both PoartA and PortB.
Definition: qspi.h:110
kQspiFlashPad_Single
Single-pad spi flash.
Definition: qspi.h:70
kQspiFlashPad_Dual
Dual-pad spi flash.
Definition: qspi.h:71
qspi_config_t::cs_setup_time
uint32_t cs_setup_time
CS setup time in terms of serial clock.(for example 1 serial clock cyle)
Definition: qspi.h:167
quadspi_erase_all
status_t quadspi_erase_all(void)
Erase the entire spi flash devices.
Definition: qspi.c:772
kQspiAHBDataTransferSize_256Bytes
AHB data transfer size is 256bytes.
Definition: qspi.h:117
qspi_config_t::config_cmd_en
uint32_t config_cmd_en
Enable config commands.
Definition: qspi.h:187
qspi_config_t::differential_clock_pin_enable
uint32_t differential_clock_pin_enable
Differential flash clock pins enable.
Definition: qspi.h:190
qspi_config_t::dqs_loopback_internal
uint32_t dqs_loopback_internal
0: dqs loopback from pad, 1: dqs loopback internally
Definition: qspi.h:194
qspi_config_t::sflash_port
uint32_t sflash_port
0–Only Port-A, 1–Both PortA and PortB
Definition: qspi.h:175
qspi_config_t::is_spansion_hyperflash
uint32_t is_spansion_hyperflash
Determine if connected spi flash device belongs to Hyperflash family.
Definition: qspi.h:206
qspi_config_t::fsphs
uint32_t fsphs
Full speed delay selection for SDR instructions.
Definition: qspi.h:181
kQspiFlashProperty_TotalFlashSizeInKBytes
Tag used to retrieve total flash size in terms of KByte.
Definition: qspi.h:89
qspi_config_t
QuadSPI Config block structure.
Definition: qspi.h:151
qspi_serial_clock_freq_t
qspi_serial_clock_freq_t
QSPI Serial Clock Frequency options.
Definition: qspi.h:77
qspi_config_t::cs_hold_time
uint32_t cs_hold_time
CS hold time in terms of serial clock.(for example 1 serial clock cyle)
Definition: qspi.h:166
quadspi_erase_sector
status_t quadspi_erase_sector(uint32_t address)
Erase one sector from the provided address.
Definition: qspi.c:844
qspi_config_t::dqs_inverse_sel
uint32_t dqs_inverse_sel
Select clock source for internal DQS generation.
Definition: qspi.h:192
quadspi_cache_clear
status_t quadspi_cache_clear(void)
Flush QSPI cache.
Definition: qspi.c:1376
qspi_config_t::write_cmd_ipcr
uint32_t write_cmd_ipcr
IPCR value of Write command.
Definition: qspi.h:163
qspi_config_t::ddr_mode_enable
uint32_t ddr_mode_enable
Enable DDR mode if set to TRUE.
Definition: qspi.h:176
quadspi_init
status_t quadspi_init(qspi_config_t *config_base)
Intialize QSPI module according to parameters passed in.
Definition: qspi.c:1340
qspi_config_t::busy_bit_offset
uint32_t busy_bit_offset
Flash device busy bit offset in status register.
Definition: qspi.h:173
kQspiConfigTag
Tag value used to validate the qspi config block.
Definition: qspi.h:54
kQspiFlashMode_Serial
Serial mode.
Definition: qspi.h:63
qspi_config_t::erase_all_cmd_address_offset
uint32_t erase_all_cmd_address_offset
Address for EraseAll command.
Definition: qspi.h:212
qspi_config_t::sflash_A1_size
uint32_t sflash_A1_size
Size of flash connected on QSPI0A Ports and QSPI0A_SS0, in terms of Bytes.
Definition: qspi.h:168
qspi_endianess_t
qspi_endianess_t
Endianess supported by QSPI module.
Definition: qspi.h:98
is_quadspi_configured
bool is_quadspi_configured(void)
Get the status of quadspi configuration.
Definition: qspi.c:1370
kStatus_QspiWriteFailure
Error code which represents that QSPI cannot perform write operation at expected frequency.
Definition: qspi.h:143
qspi_config_t::sclk_freq
uint32_t sclk_freq
In 00 - 24MHz, 01 - 48MHz, 10 - 96MHz,(only for SDR Mode)
Definition: qspi.h:172
qspi_config_t::sectorsize
uint32_t sectorsize
sector Size of Serial Flash
Definition: qspi.h:200
qspi_config_t::pre_unlock_cmd_address_offset
uint32_t pre_unlock_cmd_address_offset
Address for PreWriteEnable command.
Definition: qspi.h:208
qspi_config_t::sflash_B2_size
uint32_t sflash_B2_size
Size of flash connected on QSPI0B Ports and QSPI0B_SS1, in terms of Bytes.
Definition: qspi.h:171
kStatus_QspiCommandTimeout
Error code which represents that operation is timeout.
Definition: qspi.h:140
qspi_config_t::portA_cs1
uint32_t portA_cs1
Enable PORTA CS1.
Definition: qspi.h:179
kStatusGroup_QuadSPIDriver
QSPI driver status group number.
Definition: bootloader_common.h:157
qspiflash_pad_t
qspiflash_pad_t
External spi flash pad definition.
Definition: qspi.h:68
qspi_config_t::dqs_loopback
uint32_t dqs_loopback
Sets DQS LoopBack Mode to enable Dummy Pad MCR[24].
Definition: qspi.h:158
qspi_config_t::data_hold_time
uint32_t data_hold_time
Serial flash data In Hold time, valid value: 0/1/2.
Definition: qspi.h:159
kQspiEndianess_64BE
64-bit Big Endian
Definition: qspi.h:100
qspi_config_t::device_cmd
uint32_t device_cmd
Command to be tranferred to device.
Definition: qspi.h:162
qspi_config_t::dqs_phase_sel
uint32_t dqs_phase_sel
dqs phase sel
Definition: qspi.h:195
kStatus_QspiFlashAlignmentError
Error code which represents that start address for programming is not page aligned.
Definition: qspi.h:127
kStatus_QspiFlashCommandFailure
Error code which represents that the operation is not successfully executed.
Definition: qspi.h:131
qspi_config_t::word_addressable
uint32_t word_addressable
Determine if the serial flash is word addressable.
Definition: qspi.h:164
kStatus_QspiCommandNotSupported
Error code which represents that a command is not supported under certain mode.
Definition: qspi.h:138
kQspiPort_EnablePortA
Only PORTA is enabled.
Definition: qspi.h:109
qspiflash_property_t
qspiflash_property_t
QSPI flash property tag values.
Definition: qspi.h:85
kStatus_QspiFlashUnknownProperty
Error code which represents that the property is not supported.
Definition: qspi.h:133
kQspiFlashProperty_SectorSize
Tag used to retrieve sector size in term of byte.
Definition: qspi.h:91
kQspiEndianess_32LE
32-bit Little Endian
Definition: qspi.h:101
qspi_config_t::need_multi_phases
uint32_t need_multi_phases
Determine if multiple hases command are needed.
Definition: qspi.h:205
qspi_config_t::dqs_fb_delay_chain_sel
uint32_t dqs_fb_delay_chain_sel
dqs fb delay chain selection
Definition: qspi.h:197
kQspiAHBDataTransferSize_64Bytes
AHB data transfer size is 64bytes.
Definition: qspi.h:116
qspiflash_status_t
qspiflash_status_t
Error codes of QuadSPI driver.
Definition: qspi.h:122
standard_version_t
Structure of version property.
Definition: bootloader_common.h:168
kQspiFlaghProperty_StartAddress
Tag used to retrieve start address.
Definition: qspi.h:88
qspi_config_t::sflash_type
uint32_t sflash_type
SPI flash type: 0-Single,1–Dual 2–Quad, 3– Octal.
Definition: qspi.h:174
qspi_config_t::flash_CK2_clock_pin_enable
uint32_t flash_CK2_clock_pin_enable
Flash CK2 clock pin enable.
Definition: qspi.h:191
qspi_config_t::pre_program_cmd_address_offset
uint32_t pre_program_cmd_address_offset
Address for PreProgram command.
Definition: qspi.h:210
kQspiAHBDataTransferSize_512Bytes
AHB data transfer size is 512bytes.
Definition: qspi.h:118
qspi_port_enable_t
qspi_port_enable_t
Port Enablement Option.
Definition: qspi.h:107
kQspiFlashMode_Parallel
Parallel mode.
Definition: qspi.h:64
qspi_config_t::dqs_enable
uint32_t dqs_enable
Enable DQS mode if set to TRUE.
Definition: qspi.h:177
quadspi_serial_clock_configure
void quadspi_serial_clock_configure(qspi_serial_clock_freq_t freq)
Configure QSPI serial clock frquency.
kQspiFlashProperty_TotalFlashSize
Tag used to retrieve total flash size in terms of byte.
Definition: qspi.h:94
qspi_config_t::timeout_milliseconds
uint32_t timeout_milliseconds
Definition: qspi.h:202
kQspiFlashPad_Quad
Quad-pad spi flash.
Definition: qspi.h:72
qspi_config_t::pre_read_status_cmd_address_offset
uint32_t pre_read_status_cmd_address_offset
Address for PreReadStatus command.
Definition: qspi.h:207
qspi_config_t::fsdly
uint32_t fsdly
Full speed phase selection for SDR instructions.
Definition: qspi.h:182
qspi_config_t::sflash_B1_size
uint32_t sflash_B1_size
Size of flash connected on QSPI0B Ports and QSPI0B_SS0, in terms of Bytes.
Definition: qspi.h:170
kStatus_QspiFlashSizeError
Error code which represents that flash size is error.
Definition: qspi.h:125
qspi_config_t::ddrsmp
uint32_t ddrsmp
Select the sampling point for incomming data when serial flash is in DDR mdoe.
Definition: qspi.h:183
qspi_config_t::parallel_mode_enable
uint32_t parallel_mode_enable
Enable Individual or parrallel mode.
Definition: qspi.h:178
kQspiSerialClockFreq_Low
QuadSPI module works at low frequency.
Definition: qspi.h:79
qspi_config_t::portB_cs1
uint32_t portB_cs1
Enable PORTB CS1.
Definition: qspi.h:180
quadspi_iomux_configuration
status_t quadspi_iomux_configuration(qspi_config_t *config_base)
Configure pinmux of QSPI module according to parameters passed in.
qspiflash_mode_option_t
qspiflash_mode_option_t
QSPI Flash mode options.
Definition: qspi.h:61
__qspi_config_block_tags
__qspi_config_block_tags
Definition: qspi.h:51
kQspiFlashProperty_BlockSize
Tag used to retrieve block size in terms of byte.
Definition: qspi.h:92
qspi_config_t::dqs_fa_delay_chain_sel
uint32_t dqs_fa_delay_chain_sel
dqs fa delay chain selection
Definition: qspi.h:196
kStatusQspiModuleBusy
Error code which represents that the QSPI module is busy, which may be caused by incorrect.
Definition: qspi.h:147
qspi_config_t::unlock_cmd_address_offset
uint32_t unlock_cmd_address_offset
Address for WriteEnable command.
Definition: qspi.h:209
kQspiEndianess_32BE
32-bit Big Endian
Definition: qspi.h:102
kQspiEndianess_64LE
64-bit Little Endian
Definition: qspi.h:103
qspi_config_t::column_address_space
uint32_t column_address_space
The width of the column address.
Definition: qspi.h:186
qspi_config_t::version
standard_version_t version
Definition: qspi.h:154
qspi_config_t::tag
uint32_t tag
Set to magic number of &#39;kqcf&#39;.
Definition: qspi.h:153
kStatus_QspiNotConfigured
Error code which represents that qspi module is not configured yet.
Definition: qspi.h:135
status_t
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:121
qspi_ahb_data_transfer_size_t
qspi_ahb_data_transfer_size_t
Definition for AHB data tranfer size.
Definition: qspi.h:114
qspi_config_t::device_mode_config_en
uint32_t device_mode_config_en
Determine if it is required to config working mode of external spi flash.
Definition: qspi.h:161
quadspi_page_program
status_t quadspi_page_program(uint32_t dst_addr, const uint32_t *src, uint32_t lengthInBytes)
Page program to external spi flash.
kQspiSerialClockFreq_High
QuadSPI module works at high frequency.
Definition: qspi.h:81
qspi_config_t::dqs_latency_enable
uint32_t dqs_latency_enable
DQS Latency Enable.
Definition: qspi.h:193
qspi_config_t::sflash_A2_size
uint32_t sflash_A2_size
Size of flash connected on QSPI0A Ports and QSPI0A_SS1, in terms of Bytes.
Definition: qspi.h:169
kQspiFlashProperty_PageSize
Tag used to retreive page size in terms of byte.
Definition: qspi.h:90