Kinetis Bootloader  2.0.0
Common bootloader for Kinetis devices
fsl_uart.h
1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
7  *
8  * o Redistributions of source code must retain the above copyright notice, this list
9  * of conditions and the following disclaimer.
10  *
11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  * list of conditions and the following disclaimer in the documentation and/or
13  * other materials provided with the distribution.
14  *
15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16  * contributors may be used to endorse or promote products derived from this
17  * software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 #ifndef _FSL_UART_H_
31 #define _FSL_UART_H_
32 
33 #include "fsl_common.h"
34 
42 /*******************************************************************************
43  * Definitions
44  ******************************************************************************/
46 #define FSL_UART_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
49 enum _uart_status
50 {
58  MAKE_STATUS(kStatusGroup_UART, 6),
62 };
63 
65 typedef enum _uart_parity_mode
66 {
69  kUART_ParityOdd = 0x3U,
71 
73 typedef enum _uart_stop_bit_count
74 {
78 
85 {
86 #if defined(FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT
87  kUART_LinBreakInterruptEnable = (UART_BDH_LBKDIE_MASK),
88 #endif
89  kUART_RxActiveEdgeInterruptEnable = (UART_BDH_RXEDGIE_MASK),
90  kUART_TxDataRegEmptyInterruptEnable = (UART_C2_TIE_MASK << 8),
91  kUART_TransmissionCompleteInterruptEnable = (UART_C2_TCIE_MASK << 8),
92  kUART_RxDataRegFullInterruptEnable = (UART_C2_RIE_MASK << 8),
93  kUART_IdleLineInterruptEnable = (UART_C2_ILIE_MASK << 8),
94  kUART_RxOverrunInterruptEnable = (UART_C3_ORIE_MASK << 16),
95  kUART_NoiseErrorInterruptEnable = (UART_C3_NEIE_MASK << 16),
96  kUART_FramingErrorInterruptEnable = (UART_C3_FEIE_MASK << 16),
97  kUART_ParityErrorInterruptEnable = (UART_C3_PEIE_MASK << 16),
98 #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO
99  kUART_RxFifoOverflowInterruptEnable = (UART_CFIFO_TXOFE_MASK << 24),
100  kUART_TxFifoOverflowInterruptEnable = (UART_CFIFO_RXUFE_MASK << 24),
101  kUART_RxFifoUnderflowInterruptEnable = (UART_CFIFO_RXUFE_MASK << 24),
102 #endif
103 };
104 
111 {
112  kUART_TxDataRegEmptyFlag = (UART_S1_TDRE_MASK),
113  kUART_TransmissionCompleteFlag = (UART_S1_TC_MASK),
114  kUART_RxDataRegFullFlag = (UART_S1_RDRF_MASK),
115  kUART_IdleLineFlag = (UART_S1_IDLE_MASK),
116  kUART_RxOverrunFlag = (UART_S1_OR_MASK),
117  kUART_NoiseErrorFlag = (UART_S1_NF_MASK),
119  kUART_FramingErrorFlag = (UART_S1_FE_MASK),
121  kUART_ParityErrorFlag = (UART_S1_PF_MASK),
122 #if defined(FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT
123  kUART_LinBreakFlag = (UART_S2_LBKDIF_MASK << 8),
125 #endif
126  kUART_RxActiveEdgeFlag = (UART_S2_RXEDGIF_MASK << 8),
128  kUART_RxActiveFlag = (UART_S2_RAF_MASK << 8),
130 #if defined(FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS) && FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS
131  kUART_NoiseErrorInRxDataRegFlag = (UART_ED_NOISY_MASK << 16),
132  kUART_ParityErrorInRxDataRegFlag = (UART_ED_PARITYE_MASK << 16),
133 #endif
134 #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO
135  kUART_TxFifoEmptyFlag = (UART_SFIFO_TXEMPT_MASK << 24),
136  kUART_RxFifoEmptyFlag = (UART_SFIFO_RXEMPT_MASK << 24),
137  kUART_TxFifoOverflowFlag = (UART_SFIFO_TXOF_MASK << 24),
138  kUART_RxFifoOverflowFlag = (UART_SFIFO_RXOF_MASK << 24),
139  kUART_RxFifoUnderflowFlag = (UART_SFIFO_RXUF_MASK << 24),
140 #endif
141 };
142 
144 typedef struct _uart_config
145 {
146  uint32_t baudRate_Bps;
148 #if defined(FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
150 #endif
151 #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO
152  uint8_t txFifoWatermark;
153  uint8_t rxFifoWatermark;
154 #endif
155  bool enableTx;
156  bool enableRx;
157 } uart_config_t;
158 
160 typedef struct _uart_transfer
161 {
162  uint8_t *data;
163  size_t dataSize;
165 
166 /* Forward declaration of the handle typedef. */
167 typedef struct _uart_handle uart_handle_t;
168 
170 typedef void (*uart_transfer_callback_t)(UART_Type *base, uart_handle_t *handle, status_t status, void *userData);
171 
174 {
175  uint8_t *volatile txData;
176  volatile size_t txDataSize;
177  size_t txDataSizeAll;
178  uint8_t *volatile rxData;
179  volatile size_t rxDataSize;
180  size_t rxDataSizeAll;
182  uint8_t *rxRingBuffer;
184  volatile uint16_t rxRingBufferHead;
185  volatile uint16_t rxRingBufferTail;
188  void *userData;
190  volatile uint8_t txState;
191  volatile uint8_t rxState;
192 };
193 
194 /*******************************************************************************
195  * API
196  ******************************************************************************/
197 
198 #if defined(__cplusplus)
199 extern "C" {
200 #endif /* _cplusplus */
201 
227 void UART_Init(UART_Type *base, const uart_config_t *config, uint32_t srcClock_Hz);
228 
236 void UART_Deinit(UART_Type *base);
237 
255 
269 void UART_SetBaudRate(UART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
270 
271 /* @} */
272 
295 uint32_t UART_GetStatusFlags(UART_Type *base);
296 
313 status_t UART_ClearStatusFlags(UART_Type *base, uint32_t mask);
314 
315 /* @} */
316 
335 void UART_EnableInterrupts(UART_Type *base, uint32_t mask);
336 
350 void UART_DisableInterrupts(UART_Type *base, uint32_t mask);
351 
372 uint32_t UART_GetEnabledInterrupts(UART_Type *base);
373 
374 /* @} */
375 
376 #if defined(FSL_FEATURE_UART_HAS_DMA_SELECT) && FSL_FEATURE_UART_HAS_DMA_SELECT
377 
390 static inline uint32_t UART_GetDataRegisterAddress(UART_Type *base)
391 {
392  return (uint32_t) & (base->D);
393 }
394 
403 static inline void UART_EnableTxDMA(UART_Type *base, bool enable)
404 {
405  if (enable)
406  {
407 #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI)
408  base->C4 |= UART_C4_TDMAS_MASK;
409 #else
410  base->C5 |= UART_C5_TDMAS_MASK;
411 #endif
412  base->C2 |= UART_C2_TIE_MASK;
413  }
414  else
415  {
416 #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI)
417  base->C4 &= ~UART_C4_TDMAS_MASK;
418 #else
419  base->C5 &= ~UART_C5_TDMAS_MASK;
420 #endif
421  base->C2 &= ~UART_C2_TIE_MASK;
422  }
423 }
424 
433 static inline void UART_EnableRxDMA(UART_Type *base, bool enable)
434 {
435  if (enable)
436  {
437 #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI)
438  base->C4 |= UART_C4_RDMAS_MASK;
439 #else
440  base->C5 |= UART_C5_RDMAS_MASK;
441 #endif
442  base->C2 |= UART_C2_RIE_MASK;
443  }
444  else
445  {
446 #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI)
447  base->C4 &= ~UART_C4_RDMAS_MASK;
448 #else
449  base->C5 &= ~UART_C5_RDMAS_MASK;
450 #endif
451  base->C2 &= ~UART_C2_RIE_MASK;
452  }
453 }
454 
455 /* @} */
456 #endif /* FSL_FEATURE_UART_HAS_DMA_SELECT */
457 
471 static inline void UART_EnableTx(UART_Type *base, bool enable)
472 {
473  if (enable)
474  {
475  base->C2 |= UART_C2_TE_MASK;
476  }
477  else
478  {
479  base->C2 &= ~UART_C2_TE_MASK;
480  }
481 }
482 
491 static inline void UART_EnableRx(UART_Type *base, bool enable)
492 {
493  if (enable)
494  {
495  base->C2 |= UART_C2_RE_MASK;
496  }
497  else
498  {
499  base->C2 &= ~UART_C2_RE_MASK;
500  }
501 }
502 
517 void UART_WriteBlocking(UART_Type *base, const uint8_t *data, size_t length);
518 
528 static inline void UART_WriteByte(UART_Type *base, uint8_t data)
529 {
530  base->D = data;
531 }
532 
543 void UART_ReadBlocking(UART_Type *base, uint8_t *data, size_t length);
544 
554 static inline uint8_t UART_ReadByte(UART_Type *base)
555 {
556  return base->D;
557 }
558 
559 /* @} */
560 
578 void UART_CreateHandle(UART_Type *base, uart_handle_t *handle, uart_transfer_callback_t callback, void *userData);
579 
597 void UART_StartRingBuffer(UART_Type *base, uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize);
598 
607 void UART_StopRingBuffer(UART_Type *base, uart_handle_t *handle);
608 
627 status_t UART_SendNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer);
628 
638 void UART_AbortSend(UART_Type *base, uart_handle_t *handle);
639 
653 status_t UART_GetSendCount(UART_Type *base, uart_handle_t *handle, uint32_t *count);
654 
680 status_t UART_ReceiveNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer, size_t *receivedBytes);
681 
691 void UART_AbortReceive(UART_Type *base, uart_handle_t *handle);
692 
705 status_t UART_GetReceiveCount(UART_Type *base, uart_handle_t *handle, uint32_t *count);
706 
715 void UART_HandleIRQ(UART_Type *base, uart_handle_t *handle);
716 
725 void UART_HandleErrorIRQ(UART_Type *base, uart_handle_t *handle);
726 
727 /* @} */
728 
729 #if defined(__cplusplus)
730 }
731 #endif
732 
735 #endif /* _FSL_UART_H_ */
void UART_AbortReceive(UART_Type *base, uart_handle_t *handle)
Aborts the interrupt-driven data receiving.
Definition: fsl_uart.c:706
uint8_t rxFifoWatermark
Definition: fsl_uart.h:153
static uint8_t UART_ReadByte(UART_Type *base)
Reads the RX register directly.
Definition: fsl_uart.h:554
void UART_StartRingBuffer(UART_Type *base, uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)
Sets up the RX ring buffer.
Definition: fsl_uart.c:523
Definition: fsl_uart.h:89
volatile size_t rxDataSize
Definition: fsl_uart.h:179
void UART_Init(UART_Type *base, const uart_config_t *config, uint32_t srcClock_Hz)
Initializes a UART instance with user configuration structure and peripheral clock.
Definition: fsl_uart.c:196
Definition: fsl_uart.h:61
uint32_t UART_GetEnabledInterrupts(UART_Type *base)
Gets the enabled UART interrupts.
Definition: fsl_uart.c:365
Definition: fsl_uart.h:101
_uart_flags
UART status flags.
Definition: fsl_uart.h:110
volatile uint16_t rxRingBufferTail
Definition: fsl_uart.h:185
uart_parity_mode_t
UART parity mode.
Definition: fsl_uart.h:65
bool enableRx
Definition: fsl_uart.h:156
status_t UART_ReceiveNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer, size_t *receivedBytes)
Receives a buffer of data using an interrupt method.
Definition: fsl_uart.c:605
uint32_t baudRate_Bps
Definition: fsl_uart.h:146
void UART_HandleIRQ(UART_Type *base, uart_handle_t *handle)
UART IRQ handle function.
Definition: fsl_uart.c:736
volatile size_t txDataSize
Definition: fsl_uart.h:176
void UART_EnableInterrupts(UART_Type *base, uint32_t mask)
Enables UART interrupts according to the provided mask.
Definition: fsl_uart.c:339
Definition: fsl_uart.h:119
Definition: fsl_uart.h:112
Definition: fsl_uart.h:97
Definition: fsl_uart.h:132
size_t txDataSizeAll
Definition: fsl_uart.h:177
void UART_Deinit(UART_Type *base)
Deinitializes a UART instance.
Definition: fsl_uart.c:270
status_t UART_GetSendCount(UART_Type *base, uart_handle_t *handle, uint32_t *count)
Get the number of bytes that have been written to UART TX register.
Definition: fsl_uart.c:588
_uart_interrupt_enable
UART interrupt configuration structure, default settings all disabled.
Definition: fsl_uart.h:84
static void UART_EnableTx(UART_Type *base, bool enable)
Enables or disables the UART transmitter.
Definition: fsl_uart.h:471
Definition: fsl_uart.h:100
Definition: fsl_uart.h:93
Definition: fsl_uart.h:94
size_t dataSize
Definition: fsl_uart.h:163
Definition: fsl_uart.h:52
Definition: fsl_uart.h:56
Definition: fsl_uart.h:136
Definition: fsl_uart.h:115
status_t UART_GetReceiveCount(UART_Type *base, uart_handle_t *handle, uint32_t *count)
Get the number of bytes that have been received.
Definition: fsl_uart.c:719
Definition: fsl_uart.h:137
UART transfer structure.
Definition: fsl_uart.h:160
Definition: fsl_uart.h:57
Definition: fsl_uart.h:128
volatile uint8_t txState
Definition: fsl_uart.h:190
uint8_t * rxRingBuffer
Definition: fsl_uart.h:182
Definition: fsl_uart.h:117
Definition: fsl_uart.h:54
Definition: fsl_uart.h:92
uint8_t txFifoWatermark
Definition: fsl_uart.h:152
Definition: fsl_uart.h:138
void UART_AbortSend(UART_Type *base, uart_handle_t *handle)
Aborts the interrupt driven data transmit.
Definition: fsl_uart.c:580
Definition: fsl_uart.h:69
volatile uint16_t rxRingBufferHead
Definition: fsl_uart.h:184
uint32_t UART_GetStatusFlags(UART_Type *base)
Get UART status flags.
Definition: fsl_uart.c:378
Definition: fsl_uart.h:139
Definition: fsl_uart.h:116
Definition: fsl_uart.h:123
void UART_DisableInterrupts(UART_Type *base, uint32_t mask)
Disables the UART interrupts according to the provided mask.
Definition: fsl_uart.c:352
static void UART_EnableTxDMA(UART_Type *base, bool enable)
Enables or disables the UART transmitter DMA request.
Definition: fsl_uart.h:403
Definition: fsl_uart.h:51
Definition: fsl_uart.h:99
Definition: fsl_uart.h:53
uart_stop_bit_count_t
UART stop bit count.
Definition: fsl_uart.h:73
uint8_t * data
Definition: fsl_uart.h:162
uart_stop_bit_count_t stopBitCount
Definition: fsl_uart.h:149
static uint32_t UART_GetDataRegisterAddress(UART_Type *base)
Gets the UART data register address.
Definition: fsl_uart.h:390
size_t rxDataSizeAll
Definition: fsl_uart.h:180
UART configuration structure.
Definition: fsl_uart.h:144
void UART_CreateHandle(UART_Type *base, uart_handle_t *handle, uart_transfer_callback_t callback, void *userData)
Initializes the UART handle.
Definition: fsl_uart.c:484
Definition: fsl_uart.h:135
size_t rxRingBufferSize
Definition: fsl_uart.h:183
void UART_GetDefaultConfig(uart_config_t *config)
Gets the default configuration structure.
Definition: fsl_uart.c:290
Definition: fsl_uart.h:76
static void UART_EnableRx(UART_Type *base, bool enable)
Enables or disables the UART receiver.
Definition: fsl_uart.h:491
Definition: fsl_uart.h:121
static void UART_EnableRxDMA(UART_Type *base, bool enable)
Enables or disables the UART receiver DMA.
Definition: fsl_uart.h:433
Definition: fsl_uart.h:60
void UART_HandleErrorIRQ(UART_Type *base, uart_handle_t *handle)
UART Error IRQ handle function.
Definition: fsl_uart.c:885
bool enableTx
Definition: fsl_uart.h:155
Definition: fsl_uart.h:114
Definition: fsl_common.h:75
void * userData
Definition: fsl_uart.h:188
void UART_SetBaudRate(UART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the UART instance baud rate.
Definition: fsl_uart.c:307
uart_parity_mode_t parityMode
Definition: fsl_uart.h:147
Definition: fsl_uart.h:90
Definition: fsl_uart.h:96
Definition: fsl_uart.h:113
Definition: fsl_uart.h:55
Definition: fsl_uart.h:126
status_t UART_ClearStatusFlags(UART_Type *base, uint32_t mask)
Clears status flags with the provided mask.
Definition: fsl_uart.c:395
volatile uint8_t rxState
Definition: fsl_uart.h:191
Definition: fsl_uart.h:131
static void UART_WriteByte(UART_Type *base, uint8_t data)
Writes to the TX register.
Definition: fsl_uart.h:528
Definition: fsl_uart.h:95
Definition: fsl_uart.h:59
uint8_t *volatile txData
Definition: fsl_uart.h:175
void(* uart_transfer_callback_t)(UART_Type *base, uart_handle_t *handle, status_t status, void *userData)
UART transfer callback function.
Definition: fsl_uart.h:170
Definition: fsl_uart.h:68
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:121
void UART_WriteBlocking(UART_Type *base, const uint8_t *data, size_t length)
Writes to the TX register using a blocking method.
Definition: fsl_uart.c:436
uint8_t *volatile rxData
Definition: fsl_uart.h:178
Definition: fsl_uart.h:75
Definition: fsl_uart.h:87
Definition: fsl_uart.h:67
UART handle structure.
Definition: fsl_uart.h:173
uart_transfer_callback_t callback
Definition: fsl_uart.h:187
void UART_StopRingBuffer(UART_Type *base, uart_handle_t *handle)
Aborts the background transfer and uninstalls the ring buffer.
Definition: fsl_uart.c:540
void UART_ReadBlocking(UART_Type *base, uint8_t *data, size_t length)
Read RX data register using a blocking method.
Definition: fsl_uart.c:459
status_t UART_SendNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer)
Transmits a buffer of data using the interrupt method.
Definition: fsl_uart.c:555