Kinetis Bootloader  2.0.0
Common bootloader for Kinetis devices
bootloader_core.h
1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
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8  * o Redistributions of source code must retain the above copyright notice, this list
9  * of conditions and the following disclaimer.
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11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  * list of conditions and the following disclaimer in the documentation and/or
13  * other materials provided with the distribution.
14  *
15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16  * contributors may be used to endorse or promote products derived from this
17  * software without specific prior written permission.
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19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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29  */
30 #ifndef __BOOTLOADER_CORE_H__
31 #define __BOOTLOADER_CORE_H__
32 
33 #include "fsl_device_registers.h"
34 
35 // These functions are missing from the latest CMSIS core header files.
36 #if __CORTEX_M == 0x00
37 
42 __STATIC_INLINE void NVIC_ClearEnabledIRQs(void)
43 {
44  NVIC->ICER[0] = 0xFFFFFFFF;
45 }
46 
52 __STATIC_INLINE void NVIC_ClearAllPendingIRQs(void)
53 {
54  NVIC->ICPR[0] = 0xFFFFFFFF;
55 }
56 
57 #elif __CORTEX_M == 0x04 || __CORTEX_M == 0x07
58 
63 __STATIC_INLINE void NVIC_ClearEnabledIRQs(void)
64 {
65  NVIC->ICER[0] = 0xFFFFFFFF;
66  NVIC->ICER[1] = 0xFFFFFFFF;
67  NVIC->ICER[2] = 0xFFFFFFFF;
68  NVIC->ICER[3] = 0xFFFFFFFF;
69  NVIC->ICER[4] = 0xFFFFFFFF;
70  NVIC->ICER[5] = 0xFFFFFFFF;
71  NVIC->ICER[6] = 0xFFFFFFFF;
72  NVIC->ICER[7] = 0xFFFFFFFF;
73 }
74 
80 __STATIC_INLINE void NVIC_ClearAllPendingIRQs(void)
81 {
82  NVIC->ICPR[0] = 0xFFFFFFFF;
83  NVIC->ICPR[1] = 0xFFFFFFFF;
84  NVIC->ICPR[2] = 0xFFFFFFFF;
85  NVIC->ICPR[3] = 0xFFFFFFFF;
86  NVIC->ICPR[4] = 0xFFFFFFFF;
87  NVIC->ICPR[5] = 0xFFFFFFFF;
88  NVIC->ICPR[6] = 0xFFFFFFFF;
89  NVIC->ICPR[7] = 0xFFFFFFFF;
90 }
91 #else
92 #error CORTEX_M version not defined
93 #endif
94 
95 #endif // __BOOTLOADER_CORE_H__
96 // EOF