30 #if !defined(__BUS_PAL_HARDWARE_H__) 31 #define __BUS_PAL_HARDWARE_H__ 33 #include "dspi/fsl_dspi.h" 34 #include "i2c/fsl_i2c.h" 35 #include "bl_peripheral.h" 40 typedef struct _i2c_user_config
43 uint16_t baudRate_kbps;
49 typedef struct _dspi_user_config
64 void write_bytes_to_host(uint8_t *src, uint32_t length);
67 void host_start_command_rx(uint8_t *dest, uint32_t length);
70 void host_stop_command_rx(
void);
73 uint32_t get_bytes_received_from_host(
void);
76 void configure_spi_speed(uint32_t speedkhz);
82 void configure_i2c_address(uint8_t address);
85 void configure_i2c_speed(uint32_t speedkhz);
88 void send_spi_data(uint8_t *src, uint32_t writeLength);
91 void receive_spi_data(uint8_t *dest, uint32_t readLength);
94 void configure_can_speed(uint32_t speed);
97 void configure_can_txid(uint32_t txid);
100 void configure_can_rxid(uint32_t rxid);
103 void send_can_data(uint8_t *src, uint32_t writeLength);
106 void receive_can_data(uint8_t data, uint32_t instance);
109 void read_can_data(uint8_t *dest, uint32_t readLength);
112 void reset_can_buffer(
void);
115 status_t send_i2c_data(uint8_t *src, uint32_t writeLength);
118 status_t receive_i2c_data(uint8_t *dest, uint32_t readLength);
121 void configure_gpio(uint8_t port, uint8_t pinNum, uint8_t muxVal);
124 void set_gpio(uint8_t port, uint8_t pinNum, uint8_t level);
127 void set_fpga_clock(uint32_t clock);
129 bool scuart_poll_for_activity();
130 bool usb_hid_poll_for_activity(
const peripheral_descriptor_t *
self);
131 status_t usb_hid_packet_init(
const peripheral_descriptor_t *
self);
132 status_t usb_hid_packet_read(
const peripheral_descriptor_t *
self,
134 uint32_t *packetLength,
136 status_t usb_hid_packet_write(
const peripheral_descriptor_t *
self,
137 const uint8_t *packet,
140 #endif // __BUS_PAL_HARDWARE_H__ uint32_t baudRate_Bps
Definition: MK65F18/src/bus_pal_hardware.h:54
packet_type_t
Packet types.
Definition: bl_peripheral.h:94
dspi_clock_phase_t
DSPI clock phase configuration for a given CTAR.
Definition: fsl_dspi.h:153
dspi_clock_phase_t phase
Definition: MK65F18/src/bus_pal_hardware.h:52
user config from host for spi
Definition: MK65F18/src/bus_pal_hardware.h:49
void init_hardware(void)
hardware initialization
Definition: hardware_init_MK80F25615.c:49
dspi_clock_polarity_t polarity
Definition: MK65F18/src/bus_pal_hardware.h:51
user config from host for i2c
Definition: MK65F18/src/bus_pal_hardware.h:40
dspi_shift_direction_t
DSPI data shifter direction options for a given CTAR.
Definition: fsl_dspi.h:162
dspi_shift_direction_t direction
Definition: MK65F18/src/bus_pal_hardware.h:53
dspi_clock_polarity_t
DSPI clock polarity configuration for a given CTAR.
Definition: fsl_dspi.h:146
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:121