Kinetis Bootloader  2.0.0
Common bootloader for Kinetis devices
MK65F18/src/bus_pal_hardware.h
1 /*
2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
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9  * of conditions and the following disclaimer.
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11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  * list of conditions and the following disclaimer in the documentation and/or
13  * other materials provided with the distribution.
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16  * contributors may be used to endorse or promote products derived from this
17  * software without specific prior written permission.
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19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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29  */
30 #if !defined(__BUS_PAL_HARDWARE_H__)
31 #define __BUS_PAL_HARDWARE_H__
32 
33 #include "dspi/fsl_dspi.h"
34 #include "i2c/fsl_i2c.h"
35 #include "bl_peripheral.h"
36 
40 typedef struct _i2c_user_config
41 {
42  uint8_t slaveAddress;
43  uint16_t baudRate_kbps;
45 
49 typedef struct _dspi_user_config
50 {
54  uint32_t baudRate_Bps;
55  uint32_t clock_Hz;
57 
61 void init_hardware(void);
62 
64 void write_bytes_to_host(uint8_t *src, uint32_t length);
65 
67 void host_start_command_rx(uint8_t *dest, uint32_t length);
68 
70 void host_stop_command_rx(void);
71 
73 uint32_t get_bytes_received_from_host(void);
74 
76 void configure_spi_speed(uint32_t speedkhz);
77 
79 void configure_spi_settings(dspi_clock_polarity_t polarity, dspi_clock_phase_t phase, dspi_shift_direction_t direction);
80 
82 void configure_i2c_address(uint8_t address);
83 
85 void configure_i2c_speed(uint32_t speedkhz);
86 
88 void send_spi_data(uint8_t *src, uint32_t writeLength);
89 
91 void receive_spi_data(uint8_t *dest, uint32_t readLength);
92 
94 void configure_can_speed(uint32_t speed);
95 
97 void configure_can_txid(uint32_t txid);
98 
100 void configure_can_rxid(uint32_t rxid);
101 
103 void send_can_data(uint8_t *src, uint32_t writeLength);
104 
106 void receive_can_data(uint8_t data, uint32_t instance);
107 
109 void read_can_data(uint8_t *dest, uint32_t readLength);
110 
112 void reset_can_buffer(void);
113 
115 status_t send_i2c_data(uint8_t *src, uint32_t writeLength);
116 
118 status_t receive_i2c_data(uint8_t *dest, uint32_t readLength);
119 
121 void configure_gpio(uint8_t port, uint8_t pinNum, uint8_t muxVal);
122 
124 void set_gpio(uint8_t port, uint8_t pinNum, uint8_t level);
125 
127 void set_fpga_clock(uint32_t clock);
128 
129 bool scuart_poll_for_activity();
130 bool usb_hid_poll_for_activity(const peripheral_descriptor_t *self);
131 status_t usb_hid_packet_init(const peripheral_descriptor_t *self);
132 status_t usb_hid_packet_read(const peripheral_descriptor_t *self,
133  uint8_t **packet,
134  uint32_t *packetLength,
135  packet_type_t packetType);
136 status_t usb_hid_packet_write(const peripheral_descriptor_t *self,
137  const uint8_t *packet,
138  uint32_t byteCount,
139  packet_type_t packetType);
140 #endif // __BUS_PAL_HARDWARE_H__
141 // EOF
uint32_t baudRate_Bps
Definition: MK65F18/src/bus_pal_hardware.h:54
packet_type_t
Packet types.
Definition: bl_peripheral.h:94
dspi_clock_phase_t
DSPI clock phase configuration for a given CTAR.
Definition: fsl_dspi.h:153
dspi_clock_phase_t phase
Definition: MK65F18/src/bus_pal_hardware.h:52
user config from host for spi
Definition: MK65F18/src/bus_pal_hardware.h:49
void init_hardware(void)
hardware initialization
Definition: hardware_init_MK80F25615.c:49
dspi_clock_polarity_t polarity
Definition: MK65F18/src/bus_pal_hardware.h:51
user config from host for i2c
Definition: MK65F18/src/bus_pal_hardware.h:40
dspi_shift_direction_t
DSPI data shifter direction options for a given CTAR.
Definition: fsl_dspi.h:162
dspi_shift_direction_t direction
Definition: MK65F18/src/bus_pal_hardware.h:53
dspi_clock_polarity_t
DSPI clock polarity configuration for a given CTAR.
Definition: fsl_dspi.h:146
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:121