590 lines
22 KiB
C
590 lines
22 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_TPM_H_
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#define _FSL_TPM_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup tpm
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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#define FSL_TPM_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2 */
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/*@}*/
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/*!
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* @brief List of TPM channels.
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* @note Actual number of available channels is SoC dependent
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*/
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typedef enum _tpm_chnl
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{
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kTPM_Chnl_0 = 0U, /*!< TPM channel number 0*/
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kTPM_Chnl_1, /*!< TPM channel number 1 */
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kTPM_Chnl_2, /*!< TPM channel number 2 */
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kTPM_Chnl_3, /*!< TPM channel number 3 */
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kTPM_Chnl_4, /*!< TPM channel number 4 */
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kTPM_Chnl_5, /*!< TPM channel number 5 */
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kTPM_Chnl_6, /*!< TPM channel number 6 */
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kTPM_Chnl_7 /*!< TPM channel number 7 */
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} tpm_chnl_t;
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/*! @brief TPM PWM operation modes */
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typedef enum _tpm_pwm_mode
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{
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kTPM_EdgeAlignedPwm = 0U, /*!< Edge aligned PWM */
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kTPM_CenterAlignedPwm, /*!< Center aligned PWM */
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#if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
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kTPM_CombinedPwm /*!< Combined PWM */
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#endif
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} tpm_pwm_mode_t;
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/*! @brief TPM PWM output pulse mode: high-true, low-true or no output */
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typedef enum _tpm_pwm_level_select
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{
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kTPM_NoPwmSignal = 0U, /*!< No PWM output on pin */
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kTPM_LowTrue, /*!< Low true pulses */
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kTPM_HighTrue /*!< High true pulses */
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} tpm_pwm_level_select_t;
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/*! @brief Options to configure a TPM channel's PWM signal */
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typedef struct _tpm_chnl_pwm_signal_param
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{
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tpm_chnl_t chnlNumber; /*!< TPM channel to configure.
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In combined mode (available in some SoC's, this represents the
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channel pair number */
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tpm_pwm_level_select_t level; /*!< PWM output active level select */
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uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
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0=inactive signal(0% duty cycle)...
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100=always active signal (100% duty cycle)*/
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#if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
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uint8_t firstEdgeDelayPercent; /*!< Used only in combined PWM mode to generate asymmetrical PWM.
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Specifies the delay to the first edge in a PWM period.
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If unsure, leave as 0; Should be specified as
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percentage of the PWM period */
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#endif
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} tpm_chnl_pwm_signal_param_t;
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/*!
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* @brief Trigger options available.
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*
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* This is used for both internal & external trigger sources (external option available in certain SoC's)
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*
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* @note The actual trigger options available is SoC-specific.
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*/
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typedef enum _tpm_trigger_select
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{
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kTPM_Trigger_Select_0 = 0U,
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kTPM_Trigger_Select_1,
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kTPM_Trigger_Select_2,
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kTPM_Trigger_Select_3,
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kTPM_Trigger_Select_4,
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kTPM_Trigger_Select_5,
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kTPM_Trigger_Select_6,
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kTPM_Trigger_Select_7,
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kTPM_Trigger_Select_8,
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kTPM_Trigger_Select_9,
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kTPM_Trigger_Select_10,
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kTPM_Trigger_Select_11,
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kTPM_Trigger_Select_12,
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kTPM_Trigger_Select_13,
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kTPM_Trigger_Select_14,
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kTPM_Trigger_Select_15
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} tpm_trigger_select_t;
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#if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
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/*!
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* @brief Trigger source options available
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*
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* @note This selection is available only on some SoC's. For SoC's without this selection, the only
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* trigger source available is internal triger.
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*/
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typedef enum _tpm_trigger_source
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{
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kTPM_TriggerSource_External = 0U, /*!< Use external trigger input */
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kTPM_TriggerSource_Internal /*!< Use internal trigger */
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} tpm_trigger_source_t;
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#endif
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/*! @brief TPM output compare modes */
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typedef enum _tpm_output_compare_mode
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{
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kTPM_NoOutputSignal = (1U << TPM_CnSC_MSA_SHIFT), /*!< No channel output when counter reaches CnV */
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kTPM_ToggleOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Toggle output */
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kTPM_ClearOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)), /*!< Clear output */
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kTPM_SetOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (3U << TPM_CnSC_ELSA_SHIFT)), /*!< Set output */
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kTPM_HighPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Pulse output high */
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kTPM_LowPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)) /*!< Pulse output low */
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} tpm_output_compare_mode_t;
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/*! @brief TPM input capture edge */
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typedef enum _tpm_input_capture_edge
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{
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kTPM_RisingEdge = (1U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on rising edge only */
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kTPM_FallingEdge = (2U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on falling edge only */
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kTPM_RiseAndFallEdge = (3U << TPM_CnSC_ELSA_SHIFT) /*!< Capture on rising or falling edge */
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} tpm_input_capture_edge_t;
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#if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
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/*!
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* @brief TPM dual edge capture parameters
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*
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* @note This mode is available only on some SoC's.
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*/
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typedef struct _tpm_dual_edge_capture_param
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{
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bool enableSwap; /*!< true: Use channel n+1 input, channel n input is ignored;
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false: Use channel n input, channel n+1 input is ignored */
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tpm_input_capture_edge_t currChanEdgeMode; /*!< Input capture edge select for channel n */
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tpm_input_capture_edge_t nextChanEdgeMode; /*!< Input capture edge select for channel n+1 */
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} tpm_dual_edge_capture_param_t;
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#endif
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#if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
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/*!
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* @brief TPM quadrature decode modes
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*
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* @note This mode is available only on some SoC's.
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*/
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typedef enum _tpm_quad_decode_mode
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{
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kTPM_QuadPhaseEncode = 0U, /*!< Phase A and Phase B encoding mode */
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kTPM_QuadCountAndDir /*!< Count and direction encoding mode */
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} tpm_quad_decode_mode_t;
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/*! @brief TPM quadrature phase polarities */
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typedef enum _tpm_phase_polarity
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{
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kTPM_QuadPhaseNormal = 0U, /*!< Phase input signal is not inverted */
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kTPM_QuadPhaseInvert /*!< Phase input signal is inverted */
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} tpm_phase_polarity_t;
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/*! @brief TPM quadrature decode phase parameters */
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typedef struct _tpm_phase_param
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{
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uint32_t phaseFilterVal; /*!< Filter value, filter is disabled when the value is zero */
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tpm_phase_polarity_t phasePolarity; /*!< Phase polarity */
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} tpm_phase_params_t;
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#endif
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/*! @brief TPM clock source selection*/
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typedef enum _tpm_clock_source
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{
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kTPM_SystemClock = 1U, /*!< System clock */
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kTPM_ExternalClock /*!< External clock */
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} tpm_clock_source_t;
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/*! @brief TPM prescale value selection for the clock source*/
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typedef enum _tpm_clock_prescale
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{
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kTPM_Prescale_Divide_1 = 0U, /*!< Divide by 1 */
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kTPM_Prescale_Divide_2, /*!< Divide by 2 */
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kTPM_Prescale_Divide_4, /*!< Divide by 4 */
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kTPM_Prescale_Divide_8, /*!< Divide by 8 */
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kTPM_Prescale_Divide_16, /*!< Divide by 16 */
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kTPM_Prescale_Divide_32, /*!< Divide by 32 */
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kTPM_Prescale_Divide_64, /*!< Divide by 64 */
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kTPM_Prescale_Divide_128 /*!< Divide by 128 */
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} tpm_clock_prescale_t;
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/*!
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* @brief TPM config structure
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*
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* This structure holds the configuration settings for the TPM peripheral. To initialize this
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* structure to reasonable defaults, call the TPM_GetDefaultConfig() function and pass a
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* pointer to your config structure instance.
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*
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* The config struct can be made const so it resides in flash
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*/
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typedef struct _tpm_config
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{
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tpm_clock_prescale_t prescale; /*!< Select TPM clock prescale value */
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bool useGlobalTimeBase; /*!< true: Use of an external global time base is enabled;
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false: disabled */
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tpm_trigger_select_t triggerSelect; /*!< Input trigger to use for controlling the counter operation */
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#if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
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tpm_trigger_source_t triggerSource; /*!< Decides if we use external or internal trigger. */
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#endif
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bool enableDoze; /*!< true: TPM counter is paused in doze mode;
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false: TPM counter continues in doze mode */
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bool enableDebugMode; /*!< true: TPM counter continues in debug mode;
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false: TPM counter is paused in debug mode */
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bool enableReloadOnTrigger; /*!< true: TPM counter is reloaded on trigger;
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false: TPM counter not reloaded */
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bool enableStopOnOverflow; /*!< true: TPM counter stops after overflow;
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false: TPM counter continues running after overflow */
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bool enableStartOnTrigger; /*!< true: TPM counter only starts when a trigger is detected;
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false: TPM counter starts immediately */
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#if defined(FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER) && FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
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bool enablePauseOnTrigger; /*!< true: TPM counter will pause while trigger remains asserted;
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false: TPM counter continues running */
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#endif
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} tpm_config_t;
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/*! @brief List of TPM interrupts */
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typedef enum _tpm_interrupt_enable
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{
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kTPM_Chnl0InterruptEnable = (1U << 0), /*!< Channel 0 interrupt.*/
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kTPM_Chnl1InterruptEnable = (1U << 1), /*!< Channel 1 interrupt.*/
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kTPM_Chnl2InterruptEnable = (1U << 2), /*!< Channel 2 interrupt.*/
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kTPM_Chnl3InterruptEnable = (1U << 3), /*!< Channel 3 interrupt.*/
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kTPM_Chnl4InterruptEnable = (1U << 4), /*!< Channel 4 interrupt.*/
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kTPM_Chnl5InterruptEnable = (1U << 5), /*!< Channel 5 interrupt.*/
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kTPM_Chnl6InterruptEnable = (1U << 6), /*!< Channel 6 interrupt.*/
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kTPM_Chnl7InterruptEnable = (1U << 7), /*!< Channel 7 interrupt.*/
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kTPM_TimeOverflowInterruptEnable = (1U << 8) /*!< Time overflow interrupt.*/
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} tpm_interrupt_enable_t;
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/*! @brief List of TPM flags */
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typedef enum _tpm_status_flags
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{
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kTPM_Chnl0Flag = (1U << 0), /*!< Channel 0 flag */
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kTPM_Chnl1Flag = (1U << 1), /*!< Channel 1 flag */
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kTPM_Chnl2Flag = (1U << 2), /*!< Channel 2 flag */
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kTPM_Chnl3Flag = (1U << 3), /*!< Channel 3 flag */
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kTPM_Chnl4Flag = (1U << 4), /*!< Channel 4 flag */
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kTPM_Chnl5Flag = (1U << 5), /*!< Channel 5 flag */
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kTPM_Chnl6Flag = (1U << 6), /*!< Channel 6 flag */
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kTPM_Chnl7Flag = (1U << 7), /*!< Channel 7 flag */
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kTPM_TimeOverflowFlag = (1U << 8) /*!< Time overflow flag */
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} tpm_status_flags_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the TPM clock and configures the peripheral for basic operation.
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*
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* @note This API should be called at the beginning of the application using the TPM driver.
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*
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* @param base TPM peripheral base address
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* @param config Pointer to user's TPM config structure.
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*/
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void TPM_Init(TPM_Type *base, const tpm_config_t *config);
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/*!
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* @brief Stops the counter and gates the TPM clock
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*
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* @param base TPM peripheral base address
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*/
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void TPM_Deinit(TPM_Type *base);
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/*!
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* @brief Fill in the TPM config struct with the default settings
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*
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* The default values are:
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* @code
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* config->prescale = kTPM_Prescale_Divide_1;
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* config->useGlobalTimeBase = false;
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* config->dozeEnable = false;
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* config->dbgMode = false;
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* config->enableReloadOnTrigger = false;
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* config->enableStopOnOverflow = false;
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* config->enableStartOnTrigger = false;
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*#if FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
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* config->enablePauseOnTrigger = false;
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*#endif
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* config->triggerSelect = kTPM_Trigger_Select_0;
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*#if FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
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* config->triggerSource = kTPM_TriggerSource_External;
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*#endif
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* @endcode
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* @param config Pointer to user's TPM config structure.
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*/
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void TPM_GetDefaultConfig(tpm_config_t *config);
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/*! @}*/
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/*!
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* @name Channel mode operations
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* @{
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*/
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/*!
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* @brief Configures the PWM signal parameters
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*
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* User calls this function to configure the PWM signals period, mode, dutycycle and edge. Use this
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* function to configure all the TPM channels that will be used to output a PWM signal
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*
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* @param base TPM peripheral base address
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* @param chnlParams Array of PWM channel parameters to configure the channel(s)
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* @param numOfChnls Number of channels to configure, this should be the size of the array passed in
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* @param mode PWM operation mode, options available in enumeration ::tpm_pwm_mode_t
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* @param pwmFreq_Hz PWM signal frequency in Hz
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* @param srcClock_Hz TPM counter clock in Hz
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*
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* @return kStatus_Success if the PWM setup was successful,
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* kStatus_Error on failure
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*/
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status_t TPM_SetupPwm(TPM_Type *base,
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const tpm_chnl_pwm_signal_param_t *chnlParams,
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uint8_t numOfChnls,
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tpm_pwm_mode_t mode,
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uint32_t pwmFreq_Hz,
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uint32_t srcClock_Hz);
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/*!
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* @brief Update the duty cycle of an active PWM signal
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*
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* @param base TPM peripheral base address
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* @param chnlNumber The channel number. In combined mode, this represents
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* the channel pair number
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* @param currentPwmMode The current PWM mode set during PWM setup
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* @param dutyCyclePercent New PWM pulse width, value should be between 0 to 100
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* 0=inactive signal(0% duty cycle)...
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* 100=active signal (100% duty cycle)
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*/
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void TPM_UpdatePwmDutycycle(TPM_Type *base,
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tpm_chnl_t chnlNumber,
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tpm_pwm_mode_t currentPwmMode,
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uint8_t dutyCyclePercent);
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/*!
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* @brief Update the edge level selection for a channel
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*
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* @param base TPM peripheral base address
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* @param chnlNumber The channel number
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* @param level The level to be set to the ELSnB:ELSnA field; valid values are 00, 01, 10, 11.
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* See the appropriate SoC reference manual for details about this field.
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*/
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void TPM_UpdateChnlEdgeLevelSelect(TPM_Type *base, tpm_chnl_t chnlNumber, uint8_t level);
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/*!
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* @brief Enables capturing an input signal on the channel using the function parameters.
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*
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* When the edge specified in the captureMode argument occurs on the channel, the TPM counter is captured into
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* the CnV register. The user has to read the CnV register separately to get this value.
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*
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* @param base TPM peripheral base address
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* @param chnlNumber The channel number
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* @param captureMode Specifies which edge to capture
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*/
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void TPM_SetupInputCapture(TPM_Type *base, tpm_chnl_t chnlNumber, tpm_input_capture_edge_t captureMode);
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/*!
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* @brief Configures the TPM to generate timed pulses.
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*
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* When the TPM counter matches the value of compareVal argument (this is written into CnV reg), the channel
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* output is changed based on what is specified in the compareMode argument.
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*
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* @param base TPM peripheral base address
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* @param chnlNumber The channel number
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* @param compareMode Action to take on the channel output when the compare condition is met
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* @param compareValue Value to be programmed in the CnV register.
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*/
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void TPM_SetupOutputCompare(TPM_Type *base,
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tpm_chnl_t chnlNumber,
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tpm_output_compare_mode_t compareMode,
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uint32_t compareValue);
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#if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
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/*!
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* @brief Configures the dual edge capture mode of the TPM.
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*
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* This function allows to measure a pulse width of the signal on the input of channel of a
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* channel pair. The filter function is disabled if the filterVal argument passed is zero.
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*
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* @param base TPM peripheral base address
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* @param chnlPairNumber The TPM channel pair number; options are 0, 1, 2, 3
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* @param edgeParam Sets up the dual edge capture function
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* @param filterValue Filter value, specify 0 to disable filter.
|
|
*/
|
|
void TPM_SetupDualEdgeCapture(TPM_Type *base,
|
|
tpm_chnl_t chnlPairNumber,
|
|
const tpm_dual_edge_capture_param_t *edgeParam,
|
|
uint32_t filterValue);
|
|
#endif
|
|
|
|
#if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
|
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/*!
|
|
* @brief Configures the parameters and activates the quadrature decode mode.
|
|
*
|
|
* @param base TPM peripheral base address
|
|
* @param phaseAParams Phase A configuration parameters
|
|
* @param phaseBParams Phase B configuration parameters
|
|
* @param quadMode Selects encoding mode used in quadrature decoder mode
|
|
*/
|
|
void TPM_SetupQuadDecode(TPM_Type *base,
|
|
const tpm_phase_params_t *phaseAParams,
|
|
const tpm_phase_params_t *phaseBParams,
|
|
tpm_quad_decode_mode_t quadMode);
|
|
#endif
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @name Interrupt Interface
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Enables the selected TPM interrupts.
|
|
*
|
|
* @param base TPM peripheral base address
|
|
* @param mask The interrupts to enable. This is a logical OR of members of the
|
|
* enumeration ::tpm_interrupt_enable_t
|
|
*/
|
|
void TPM_EnableInterrupts(TPM_Type *base, uint32_t mask);
|
|
|
|
/*!
|
|
* @brief Disables the selected TPM interrupts.
|
|
*
|
|
* @param base TPM peripheral base address
|
|
* @param mask The interrupts to disable. This is a logical OR of members of the
|
|
* enumeration ::tpm_interrupt_enable_t
|
|
*/
|
|
void TPM_DisableInterrupts(TPM_Type *base, uint32_t mask);
|
|
|
|
/*!
|
|
* @brief Gets the enabled TPM interrupts.
|
|
*
|
|
* @param base TPM peripheral base address
|
|
*
|
|
* @return The enabled interrupts. This is the logical OR of members of the
|
|
* enumeration ::tpm_interrupt_enable_t
|
|
*/
|
|
uint32_t TPM_GetEnabledInterrupts(TPM_Type *base);
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @name Status Interface
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Gets the TPM status flags
|
|
*
|
|
* @param base TPM peripheral base address
|
|
*
|
|
* @return The status flags. This is the logical OR of members of the
|
|
* enumeration ::tpm_status_flags_t
|
|
*/
|
|
static inline uint32_t TPM_GetStatusFlags(TPM_Type *base)
|
|
{
|
|
return base->STATUS;
|
|
}
|
|
|
|
/*!
|
|
* @brief Clears the TPM status flags
|
|
*
|
|
* @param base TPM peripheral base address
|
|
* @param mask The status flags to clear. This is a logical OR of members of the
|
|
* enumeration ::tpm_status_flags_t
|
|
*/
|
|
static inline void TPM_ClearStatusFlags(TPM_Type *base, uint32_t mask)
|
|
{
|
|
/* Clear the status flags */
|
|
base->STATUS = mask;
|
|
}
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @name Timer Start and Stop
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Starts the TPM counter.
|
|
*
|
|
*
|
|
* @param base TPM peripheral base address
|
|
* @param clockSource TPM clock source; once clock source is set the counter will start running
|
|
*/
|
|
static inline void TPM_StartTimer(TPM_Type *base, tpm_clock_source_t clockSource)
|
|
{
|
|
uint32_t reg = base->SC;
|
|
|
|
reg &= ~(TPM_SC_CMOD_MASK);
|
|
reg |= TPM_SC_CMOD(clockSource);
|
|
base->SC = reg;
|
|
}
|
|
|
|
/*!
|
|
* @brief Stops the TPM counter.
|
|
*
|
|
* @param base TPM peripheral base address
|
|
*/
|
|
static inline void TPM_StopTimer(TPM_Type *base)
|
|
{
|
|
/* Set clock source to none to disable counter */
|
|
base->SC &= ~(TPM_SC_CMOD_MASK);
|
|
|
|
/* Wait till this reads as zero acknowledging the counter is disabled */
|
|
while (base->SC & TPM_SC_CMOD_MASK)
|
|
{
|
|
}
|
|
}
|
|
|
|
/*! @}*/
|
|
|
|
#if defined(FSL_FEATURE_TPM_HAS_GLOBAL) && FSL_FEATURE_TPM_HAS_GLOBAL
|
|
/*!
|
|
* @brief Performs a software reset on the TPM module.
|
|
*
|
|
* Reset all internal logic and registers, except the Global Register. Remains set until cleared by software..
|
|
*
|
|
* @note TPM software reset is available on certain SoC's only
|
|
*
|
|
* @param base TPM peripheral base address
|
|
*/
|
|
static inline void TPM_Reset(TPM_Type *base)
|
|
{
|
|
base->GLOBAL |= TPM_GLOBAL_RST_MASK;
|
|
base->GLOBAL &= ~TPM_GLOBAL_RST_MASK;
|
|
}
|
|
#endif
|
|
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
/*! @}*/
|
|
|
|
#endif /* _FSL_TPM_H_ */
|