146 lines
4.9 KiB
C
146 lines
4.9 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_common.h"
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#include "fsl_smc.h"
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#include "clock_config.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*
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* How to setup clock using clock driver functions:
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*
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* 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
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* and flash clock are in allowed range during clock mode switch.
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*
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* 2. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
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*
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* 3. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
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*/
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void BOARD_BootClockVLPR(void)
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{
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/*
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* Core clock: 2MHz
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* Bus clock: 1MHz
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*/
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const mcglite_config_t mcgliteConfig = {
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.outSrc = kMCGLITE_ClkSrcLirc,
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.irclkEnableMode = kMCGLITE_IrclkEnable,
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.ircs = kMCGLITE_Lirc2M,
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.fcrdiv = kMCGLITE_LircDivBy1,
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.lircDiv2 = kMCGLITE_LircDivBy1,
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.hircEnableInNotHircMode = false,
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};
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const sim_clock_config_t simConfig =
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{
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#if (defined(FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION) && FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION)
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.er32kSrc = 0U, /* SIM_SOPT1[OSC32KSEL]. */
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#endif
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.clkdiv1 = 0x00010000U, /* SIM_CLKDIV1. */
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};
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CLOCK_SetSimSafeDivs();
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CLOCK_SetMcgliteConfig(&mcgliteConfig);
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CLOCK_SetSimConfig(&simConfig);
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SystemCoreClock = 2000000U;
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SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
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SMC_SetPowerModeVlpr(SMC);
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while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
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{
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}
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}
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void BOARD_BootClockRUN(void)
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{
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/*
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* Core clock: 48MHz
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* Bus clock: 24MHz
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*/
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const mcglite_config_t mcgliteConfig = {
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.outSrc = kMCGLITE_ClkSrcHirc,
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.irclkEnableMode = 0U,
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.ircs = kMCGLITE_Lirc8M,
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.fcrdiv = kMCGLITE_LircDivBy1,
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.lircDiv2 = kMCGLITE_LircDivBy1,
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.hircEnableInNotHircMode = true,
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};
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const sim_clock_config_t simConfig =
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{
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#if (defined(FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION) && FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION)
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.er32kSrc = 0U, /* SIM_SOPT1[OSC32KSEL]. */
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#endif
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.clkdiv1 = 0x00010000U, /* SIM_CLKDIV1. */
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};
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CLOCK_SetSimSafeDivs();
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CLOCK_SetMcgliteConfig(&mcgliteConfig);
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CLOCK_SetSimConfig(&simConfig);
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SystemCoreClock = 48000000U;
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}
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void BOARD_InitOsc0(void)
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{
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const osc_config_t oscConfig = {.freq = BOARD_XTAL0_CLK_HZ,
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.capLoad = 0U,
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.workMode = kOSC_ModeOscLowPower,
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.oscerConfig = {
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.enableMode = kOSC_ErClkEnable,
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#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
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.erclkDiv = 0U,
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#endif
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}};
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CLOCK_InitOsc0(&oscConfig);
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/* Passing the XTAL0 frequency to clock driver. */
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CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);
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}
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