838 lines
38 KiB
ArmAsm
838 lines
38 KiB
ArmAsm
/* ---------------------------------------------------------------------------------------*/
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/* @file: startup_MK22F51212.s */
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/* @purpose: CMSIS Cortex-M4 Core Device Startup File */
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/* MK22F51212 */
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/* @version: 2.9 */
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/* @date: 2016-3-21 */
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/* @build: b160321 */
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/* ---------------------------------------------------------------------------------------*/
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/* */
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/* Copyright (c) 1997 - 2016 , Freescale Semiconductor, Inc. */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without modification, */
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/* are permitted provided that the following conditions are met: */
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/* */
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/* o Redistributions of source code must retain the above copyright notice, this list */
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/* of conditions and the following disclaimer. */
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/* */
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/* o Redistributions in binary form must reproduce the above copyright notice, this */
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/* list of conditions and the following disclaimer in the documentation and/or */
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/* other materials provided with the distribution. */
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/* */
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/* o Neither the name of Freescale Semiconductor, Inc. nor the names of its */
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/* contributors may be used to endorse or promote products derived from this */
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/* software without specific prior written permission. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND */
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/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */
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/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
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/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR */
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/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
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/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; */
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/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON */
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/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
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/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */
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/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/*****************************************************************************/
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/* Version: GCC for ARM Embedded Processors */
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/*****************************************************************************/
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.syntax unified
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.arch armv7-m
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.section .isr_vector, "a"
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler*/
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.long HardFault_Handler /* Hard Fault Handler*/
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.long MemManage_Handler /* MPU Fault Handler*/
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.long BusFault_Handler /* Bus Fault Handler*/
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.long UsageFault_Handler /* Usage Fault Handler*/
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.long 0 /* Reserved*/
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.long 0 /* Reserved*/
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.long 0 /* Reserved*/
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.long 0 /* Reserved*/
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.long SVC_Handler /* SVCall Handler*/
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.long DebugMon_Handler /* Debug Monitor Handler*/
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.long 0 /* Reserved*/
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.long PendSV_Handler /* PendSV Handler*/
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.long SysTick_Handler /* SysTick Handler*/
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/* External Interrupts*/
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.long DMA0_IRQHandler /* DMA Channel 0 Transfer Complete*/
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.long DMA1_IRQHandler /* DMA Channel 1 Transfer Complete*/
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.long DMA2_IRQHandler /* DMA Channel 2 Transfer Complete*/
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.long DMA3_IRQHandler /* DMA Channel 3 Transfer Complete*/
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.long DMA4_IRQHandler /* DMA Channel 4 Transfer Complete*/
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.long DMA5_IRQHandler /* DMA Channel 5 Transfer Complete*/
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.long DMA6_IRQHandler /* DMA Channel 6 Transfer Complete*/
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.long DMA7_IRQHandler /* DMA Channel 7 Transfer Complete*/
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.long DMA8_IRQHandler /* DMA Channel 8 Transfer Complete*/
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.long DMA9_IRQHandler /* DMA Channel 9 Transfer Complete*/
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.long DMA10_IRQHandler /* DMA Channel 10 Transfer Complete*/
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.long DMA11_IRQHandler /* DMA Channel 11 Transfer Complete*/
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.long DMA12_IRQHandler /* DMA Channel 12 Transfer Complete*/
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.long DMA13_IRQHandler /* DMA Channel 13 Transfer Complete*/
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.long DMA14_IRQHandler /* DMA Channel 14 Transfer Complete*/
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.long DMA15_IRQHandler /* DMA Channel 15 Transfer Complete*/
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.long DMA_Error_IRQHandler /* DMA Error Interrupt*/
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.long MCM_IRQHandler /* Normal Interrupt*/
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.long FTF_IRQHandler /* FTFA Command complete interrupt*/
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.long Read_Collision_IRQHandler /* Read Collision Interrupt*/
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.long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning*/
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.long LLWU_IRQHandler /* Low Leakage Wakeup Unit*/
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.long WDOG_EWM_IRQHandler /* WDOG Interrupt*/
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.long RNG_IRQHandler /* RNG Interrupt*/
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.long I2C0_IRQHandler /* I2C0 interrupt*/
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.long I2C1_IRQHandler /* I2C1 interrupt*/
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.long SPI0_IRQHandler /* SPI0 Interrupt*/
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.long SPI1_IRQHandler /* SPI1 Interrupt*/
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.long I2S0_Tx_IRQHandler /* I2S0 transmit interrupt*/
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.long I2S0_Rx_IRQHandler /* I2S0 receive interrupt*/
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.long LPUART0_IRQHandler /* LPUART0 status/error interrupt*/
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.long UART0_RX_TX_IRQHandler /* UART0 Receive/Transmit interrupt*/
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.long UART0_ERR_IRQHandler /* UART0 Error interrupt*/
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.long UART1_RX_TX_IRQHandler /* UART1 Receive/Transmit interrupt*/
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.long UART1_ERR_IRQHandler /* UART1 Error interrupt*/
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.long UART2_RX_TX_IRQHandler /* UART2 Receive/Transmit interrupt*/
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.long UART2_ERR_IRQHandler /* UART2 Error interrupt*/
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.long Reserved53_IRQHandler /* Reserved interrupt 53*/
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.long Reserved54_IRQHandler /* Reserved interrupt 54*/
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.long ADC0_IRQHandler /* ADC0 interrupt*/
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.long CMP0_IRQHandler /* CMP0 interrupt*/
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.long CMP1_IRQHandler /* CMP1 interrupt*/
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.long FTM0_IRQHandler /* FTM0 fault, overflow and channels interrupt*/
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.long FTM1_IRQHandler /* FTM1 fault, overflow and channels interrupt*/
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.long FTM2_IRQHandler /* FTM2 fault, overflow and channels interrupt*/
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.long Reserved61_IRQHandler /* Reserved interrupt 61*/
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.long RTC_IRQHandler /* RTC interrupt*/
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.long RTC_Seconds_IRQHandler /* RTC seconds interrupt*/
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.long PIT0_IRQHandler /* PIT timer channel 0 interrupt*/
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.long PIT1_IRQHandler /* PIT timer channel 1 interrupt*/
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.long PIT2_IRQHandler /* PIT timer channel 2 interrupt*/
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.long PIT3_IRQHandler /* PIT timer channel 3 interrupt*/
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.long PDB0_IRQHandler /* PDB0 Interrupt*/
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.long USB0_IRQHandler /* USB0 interrupt*/
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.long Reserved70_IRQHandler /* Reserved interrupt 70*/
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.long Reserved71_IRQHandler /* Reserved interrupt 71*/
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.long DAC0_IRQHandler /* DAC0 interrupt*/
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.long MCG_IRQHandler /* MCG Interrupt*/
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.long LPTMR0_IRQHandler /* LPTimer interrupt*/
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.long PORTA_IRQHandler /* Port A interrupt*/
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.long PORTB_IRQHandler /* Port B interrupt*/
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.long PORTC_IRQHandler /* Port C interrupt*/
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.long PORTD_IRQHandler /* Port D interrupt*/
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.long PORTE_IRQHandler /* Port E interrupt*/
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.long SWI_IRQHandler /* Software interrupt*/
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.long Reserved81_IRQHandler /* Reserved interrupt 81*/
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.long Reserved82_IRQHandler /* Reserved interrupt 82*/
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.long Reserved83_IRQHandler /* Reserved interrupt 83*/
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.long Reserved84_IRQHandler /* Reserved interrupt 84*/
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.long Reserved85_IRQHandler /* Reserved interrupt 85*/
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.long Reserved86_IRQHandler /* Reserved interrupt 86*/
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.long FTM3_IRQHandler /* FTM3 fault, overflow and channels interrupt*/
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.long DAC1_IRQHandler /* DAC1 interrupt*/
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.long ADC1_IRQHandler /* ADC1 interrupt*/
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.long Reserved90_IRQHandler /* Reserved Interrupt 90*/
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.long Reserved91_IRQHandler /* Reserved Interrupt 91*/
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.long Reserved92_IRQHandler /* Reserved Interrupt 92*/
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.long Reserved93_IRQHandler /* Reserved Interrupt 93*/
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.long Reserved94_IRQHandler /* Reserved Interrupt 94*/
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.long Reserved95_IRQHandler /* Reserved Interrupt 95*/
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.long Reserved96_IRQHandler /* Reserved Interrupt 96*/
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.long Reserved97_IRQHandler /* Reserved Interrupt 97*/
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.long Reserved98_IRQHandler /* Reserved Interrupt 98*/
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.long Reserved99_IRQHandler /* Reserved Interrupt 99*/
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.long Reserved100_IRQHandler /* Reserved Interrupt 100*/
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.long Reserved101_IRQHandler /* Reserved Interrupt 101*/
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.long DefaultISR /* 102*/
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.long DefaultISR /* 103*/
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.long DefaultISR /* 104*/
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.long DefaultISR /* 105*/
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.long DefaultISR /* 106*/
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.long DefaultISR /* 107*/
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.long DefaultISR /* 108*/
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.long DefaultISR /* 109*/
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.long DefaultISR /* 110*/
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.long DefaultISR /* 111*/
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.long DefaultISR /* 112*/
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.long DefaultISR /* 113*/
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.long DefaultISR /* 114*/
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.long DefaultISR /* 115*/
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.long DefaultISR /* 116*/
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.long DefaultISR /* 117*/
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.long DefaultISR /* 118*/
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.long DefaultISR /* 119*/
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.long DefaultISR /* 120*/
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.long DefaultISR /* 121*/
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.long DefaultISR /* 122*/
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.long DefaultISR /* 123*/
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.long DefaultISR /* 124*/
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.long DefaultISR /* 125*/
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.long DefaultISR /* 126*/
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.long DefaultISR /* 127*/
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.long DefaultISR /* 128*/
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.long DefaultISR /* 129*/
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.long DefaultISR /* 130*/
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.long DefaultISR /* 131*/
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.long DefaultISR /* 132*/
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.long DefaultISR /* 133*/
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.long DefaultISR /* 134*/
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.long DefaultISR /* 135*/
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.long DefaultISR /* 136*/
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.long DefaultISR /* 137*/
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.long DefaultISR /* 138*/
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.long DefaultISR /* 139*/
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.long DefaultISR /* 140*/
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.long DefaultISR /* 141*/
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.long DefaultISR /* 142*/
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.long DefaultISR /* 143*/
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.long DefaultISR /* 144*/
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.long DefaultISR /* 145*/
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.long DefaultISR /* 146*/
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.long DefaultISR /* 147*/
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.long DefaultISR /* 148*/
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.long DefaultISR /* 149*/
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.long DefaultISR /* 150*/
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.long DefaultISR /* 151*/
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.long DefaultISR /* 152*/
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.long DefaultISR /* 153*/
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.long DefaultISR /* 154*/
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.long DefaultISR /* 155*/
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.long DefaultISR /* 156*/
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.long DefaultISR /* 157*/
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.long DefaultISR /* 158*/
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.long DefaultISR /* 159*/
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.long DefaultISR /* 160*/
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.long DefaultISR /* 161*/
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.long DefaultISR /* 162*/
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.long DefaultISR /* 163*/
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.long DefaultISR /* 164*/
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.long DefaultISR /* 165*/
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.long DefaultISR /* 166*/
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.long DefaultISR /* 167*/
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.long DefaultISR /* 168*/
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.long DefaultISR /* 169*/
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.long DefaultISR /* 170*/
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.long DefaultISR /* 171*/
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.long DefaultISR /* 172*/
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.long DefaultISR /* 173*/
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.long DefaultISR /* 174*/
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.long DefaultISR /* 175*/
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.long DefaultISR /* 176*/
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.long DefaultISR /* 177*/
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.long DefaultISR /* 178*/
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.long DefaultISR /* 179*/
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.long DefaultISR /* 180*/
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.long DefaultISR /* 181*/
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.long DefaultISR /* 182*/
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.long DefaultISR /* 183*/
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.long DefaultISR /* 184*/
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.long DefaultISR /* 185*/
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.long DefaultISR /* 186*/
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.long DefaultISR /* 187*/
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.long DefaultISR /* 188*/
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.long DefaultISR /* 189*/
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.long DefaultISR /* 190*/
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.long DefaultISR /* 191*/
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.long DefaultISR /* 192*/
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.long DefaultISR /* 193*/
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.long DefaultISR /* 194*/
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.long DefaultISR /* 195*/
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.long DefaultISR /* 196*/
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.long DefaultISR /* 197*/
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.long DefaultISR /* 198*/
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.long DefaultISR /* 199*/
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.long DefaultISR /* 200*/
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.long DefaultISR /* 201*/
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.long DefaultISR /* 202*/
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.long DefaultISR /* 203*/
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.long DefaultISR /* 204*/
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.long DefaultISR /* 205*/
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.long DefaultISR /* 206*/
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.long DefaultISR /* 207*/
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.long DefaultISR /* 208*/
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.long DefaultISR /* 209*/
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.long DefaultISR /* 210*/
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.long DefaultISR /* 211*/
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.long DefaultISR /* 212*/
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.long DefaultISR /* 213*/
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.long DefaultISR /* 214*/
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.long DefaultISR /* 215*/
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.long DefaultISR /* 216*/
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.long DefaultISR /* 217*/
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.long DefaultISR /* 218*/
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.long DefaultISR /* 219*/
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.long DefaultISR /* 220*/
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.long DefaultISR /* 221*/
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.long DefaultISR /* 222*/
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.long DefaultISR /* 223*/
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.long DefaultISR /* 224*/
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.long DefaultISR /* 225*/
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.long DefaultISR /* 226*/
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.long DefaultISR /* 227*/
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.long DefaultISR /* 228*/
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.long DefaultISR /* 229*/
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.long DefaultISR /* 230*/
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.long DefaultISR /* 231*/
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.long DefaultISR /* 232*/
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.long DefaultISR /* 233*/
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.long DefaultISR /* 234*/
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.long DefaultISR /* 235*/
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.long DefaultISR /* 236*/
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.long DefaultISR /* 237*/
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.long DefaultISR /* 238*/
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.long DefaultISR /* 239*/
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// .long 0xFFFFFFFF /* Reserved for user TRIM value*/
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/* SGF This is the actual BCA that is being loaded by the bootloader at reset time to check what to do.
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The key value is Direct boot, which we have enabled. So by default the BL will just jump to the
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user application unless some of the check conditions are not present. */
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//__bootloaderConfigurationArea ; 0x3c0
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// .long 'kcfg' // [00:03] tag - Tag value used to validate the bootloader configuration data. Must be set to 'kcfg'
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.long 0x6766636b /* Be aware of endianness SGF */
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.long 0xFFFFFFFF // [04:07] crcStartAddress
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.long 0xFFFFFFFF // [08:0b] crcByteCount
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.long 0xFFFFFFFF // [0c:0f] crcExpectedValue
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.byte 0x10 // [10:10] enabledPeripherals /* SGF Bit 4 corresponds to USB HID */
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.byte 0xFF // [11:11] i2cSlaveAddress
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.short 5000 // [12:13] peripheralDetectionTimeoutMs - Timeout in milliseconds for peripheral detection before jumping to application code
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.short 0xFFFF // [14:15] usbVid
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.short 0xFFFF // [16:17] usbPid
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.long 0xFFFFFFFF // [18:1b] usbStringsPointer
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.byte 0x00 // [1c:1c] clockFlags - High Speed and other clock options /* SGF Set to 0 to enable 48 MHz CLK and USB HID */
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.byte 0xFF // [1d:1d] clockDivider - One's complement of clock divider, zero divider is divide by 1
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.byte 0xFE // [1e] SGF Direct boot in 1's complement. FE means direct boot enabled.
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.byte 0xFF // [1f] reserved
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// Fill to align with flash configuration field.
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF
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.long 0xFFFFFFFF // Reserved for user TRIM value
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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/* Reset Handler */
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.thumb_func
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.align 2
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.globl Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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cpsid i /* Mask interrupts */
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.equ VTOR, 0xE000ED08
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ldr r0, =VTOR
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ldr r1, =__isr_vector
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str r1, [r0]
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#ifndef __NO_SYSTEM_INIT
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ldr r0,=SystemInit
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blx r0
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#endif
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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#if 0
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/* Here are two copies of loop implemenations. First one favors code size
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* and the second one favors performance. Default uses the first one.
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* Change to "#if 0" to use the second one */
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.LC0:
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cmp r2, r3
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ittt lt
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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blt .LC0
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#else
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subs r3, r2
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ble .LC1
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.LC0:
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subs r3, #4
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ldr r0, [r1, r3]
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str r0, [r2, r3]
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bgt .LC0
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.LC1:
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#endif
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#ifdef __STARTUP_CLEAR_BSS
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/* This part of work usually is done in C library startup code. Otherwise,
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* define this macro to enable it in this startup.
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*
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* Loop to zero out BSS section, which uses following symbols
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* in linker script:
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* __bss_start__: start of BSS section. Must align to 4
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* __bss_end__: end of BSS section. Must align to 4
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*/
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ldr r1, =__bss_start__
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ldr r2, =__bss_end__
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movs r0, 0
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.LC2:
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cmp r1, r2
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itt lt
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strlt r0, [r1], #4
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blt .LC2
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#endif /* __STARTUP_CLEAR_BSS */
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cpsie i /* Unmask interrupts */
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#ifndef __START
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#define __START _start
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#endif
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#ifndef __ATOLLIC__
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ldr r0,=__START
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blx r0
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#else
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ldr r0,=__libc_init_array
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blx r0
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ldr r0,=main
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bx r0
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#endif
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.pool
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.size Reset_Handler, . - Reset_Handler
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.align 1
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.thumb_func
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.weak DefaultISR
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.type DefaultISR, %function
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DefaultISR:
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b DefaultISR
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.size DefaultISR, . - DefaultISR
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.align 1
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.thumb_func
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.weak NMI_Handler
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.type NMI_Handler, %function
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NMI_Handler:
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ldr r0,=NMI_Handler
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bx r0
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.size NMI_Handler, . - NMI_Handler
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.align 1
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.thumb_func
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.weak HardFault_Handler
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.type HardFault_Handler, %function
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HardFault_Handler:
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ldr r0,=HardFault_Handler
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bx r0
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.size HardFault_Handler, . - HardFault_Handler
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.align 1
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.thumb_func
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.weak SVC_Handler
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.type SVC_Handler, %function
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SVC_Handler:
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ldr r0,=SVC_Handler
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bx r0
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.size SVC_Handler, . - SVC_Handler
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.align 1
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.thumb_func
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.weak PendSV_Handler
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.type PendSV_Handler, %function
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PendSV_Handler:
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ldr r0,=PendSV_Handler
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bx r0
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.size PendSV_Handler, . - PendSV_Handler
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.align 1
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.thumb_func
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.weak SysTick_Handler
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.type SysTick_Handler, %function
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SysTick_Handler:
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ldr r0,=SysTick_Handler
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bx r0
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.size SysTick_Handler, . - SysTick_Handler
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.align 1
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.thumb_func
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.weak DMA0_IRQHandler
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.type DMA0_IRQHandler, %function
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DMA0_IRQHandler:
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ldr r0,=DMA0_DriverIRQHandler
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bx r0
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.size DMA0_IRQHandler, . - DMA0_IRQHandler
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.align 1
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.thumb_func
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.weak DMA1_IRQHandler
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.type DMA1_IRQHandler, %function
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DMA1_IRQHandler:
|
|
ldr r0,=DMA1_DriverIRQHandler
|
|
bx r0
|
|
.size DMA1_IRQHandler, . - DMA1_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA2_IRQHandler
|
|
.type DMA2_IRQHandler, %function
|
|
DMA2_IRQHandler:
|
|
ldr r0,=DMA2_DriverIRQHandler
|
|
bx r0
|
|
.size DMA2_IRQHandler, . - DMA2_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA3_IRQHandler
|
|
.type DMA3_IRQHandler, %function
|
|
DMA3_IRQHandler:
|
|
ldr r0,=DMA3_DriverIRQHandler
|
|
bx r0
|
|
.size DMA3_IRQHandler, . - DMA3_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA4_IRQHandler
|
|
.type DMA4_IRQHandler, %function
|
|
DMA4_IRQHandler:
|
|
ldr r0,=DMA4_DriverIRQHandler
|
|
bx r0
|
|
.size DMA4_IRQHandler, . - DMA4_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA5_IRQHandler
|
|
.type DMA5_IRQHandler, %function
|
|
DMA5_IRQHandler:
|
|
ldr r0,=DMA5_DriverIRQHandler
|
|
bx r0
|
|
.size DMA5_IRQHandler, . - DMA5_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA6_IRQHandler
|
|
.type DMA6_IRQHandler, %function
|
|
DMA6_IRQHandler:
|
|
ldr r0,=DMA6_DriverIRQHandler
|
|
bx r0
|
|
.size DMA6_IRQHandler, . - DMA6_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA7_IRQHandler
|
|
.type DMA7_IRQHandler, %function
|
|
DMA7_IRQHandler:
|
|
ldr r0,=DMA7_DriverIRQHandler
|
|
bx r0
|
|
.size DMA7_IRQHandler, . - DMA7_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA8_IRQHandler
|
|
.type DMA8_IRQHandler, %function
|
|
DMA8_IRQHandler:
|
|
ldr r0,=DMA8_DriverIRQHandler
|
|
bx r0
|
|
.size DMA8_IRQHandler, . - DMA8_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA9_IRQHandler
|
|
.type DMA9_IRQHandler, %function
|
|
DMA9_IRQHandler:
|
|
ldr r0,=DMA9_DriverIRQHandler
|
|
bx r0
|
|
.size DMA9_IRQHandler, . - DMA9_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA10_IRQHandler
|
|
.type DMA10_IRQHandler, %function
|
|
DMA10_IRQHandler:
|
|
ldr r0,=DMA10_DriverIRQHandler
|
|
bx r0
|
|
.size DMA10_IRQHandler, . - DMA10_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA11_IRQHandler
|
|
.type DMA11_IRQHandler, %function
|
|
DMA11_IRQHandler:
|
|
ldr r0,=DMA11_DriverIRQHandler
|
|
bx r0
|
|
.size DMA11_IRQHandler, . - DMA11_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA12_IRQHandler
|
|
.type DMA12_IRQHandler, %function
|
|
DMA12_IRQHandler:
|
|
ldr r0,=DMA12_DriverIRQHandler
|
|
bx r0
|
|
.size DMA12_IRQHandler, . - DMA12_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA13_IRQHandler
|
|
.type DMA13_IRQHandler, %function
|
|
DMA13_IRQHandler:
|
|
ldr r0,=DMA13_DriverIRQHandler
|
|
bx r0
|
|
.size DMA13_IRQHandler, . - DMA13_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA14_IRQHandler
|
|
.type DMA14_IRQHandler, %function
|
|
DMA14_IRQHandler:
|
|
ldr r0,=DMA14_DriverIRQHandler
|
|
bx r0
|
|
.size DMA14_IRQHandler, . - DMA14_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA15_IRQHandler
|
|
.type DMA15_IRQHandler, %function
|
|
DMA15_IRQHandler:
|
|
ldr r0,=DMA15_DriverIRQHandler
|
|
bx r0
|
|
.size DMA15_IRQHandler, . - DMA15_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak DMA_Error_IRQHandler
|
|
.type DMA_Error_IRQHandler, %function
|
|
DMA_Error_IRQHandler:
|
|
ldr r0,=DMA_Error_DriverIRQHandler
|
|
bx r0
|
|
.size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak I2C0_IRQHandler
|
|
.type I2C0_IRQHandler, %function
|
|
I2C0_IRQHandler:
|
|
ldr r0,=I2C0_DriverIRQHandler
|
|
bx r0
|
|
.size I2C0_IRQHandler, . - I2C0_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak I2C1_IRQHandler
|
|
.type I2C1_IRQHandler, %function
|
|
I2C1_IRQHandler:
|
|
ldr r0,=I2C1_DriverIRQHandler
|
|
bx r0
|
|
.size I2C1_IRQHandler, . - I2C1_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak SPI0_IRQHandler
|
|
.type SPI0_IRQHandler, %function
|
|
SPI0_IRQHandler:
|
|
ldr r0,=SPI0_DriverIRQHandler
|
|
bx r0
|
|
.size SPI0_IRQHandler, . - SPI0_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak SPI1_IRQHandler
|
|
.type SPI1_IRQHandler, %function
|
|
SPI1_IRQHandler:
|
|
ldr r0,=SPI1_DriverIRQHandler
|
|
bx r0
|
|
.size SPI1_IRQHandler, . - SPI1_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak I2S0_Tx_IRQHandler
|
|
.type I2S0_Tx_IRQHandler, %function
|
|
I2S0_Tx_IRQHandler:
|
|
ldr r0,=I2S0_Tx_DriverIRQHandler
|
|
bx r0
|
|
.size I2S0_Tx_IRQHandler, . - I2S0_Tx_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak I2S0_Rx_IRQHandler
|
|
.type I2S0_Rx_IRQHandler, %function
|
|
I2S0_Rx_IRQHandler:
|
|
ldr r0,=I2S0_Rx_DriverIRQHandler
|
|
bx r0
|
|
.size I2S0_Rx_IRQHandler, . - I2S0_Rx_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak LPUART0_IRQHandler
|
|
.type LPUART0_IRQHandler, %function
|
|
LPUART0_IRQHandler:
|
|
ldr r0,=LPUART0_DriverIRQHandler
|
|
bx r0
|
|
.size LPUART0_IRQHandler, . - LPUART0_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART0_RX_TX_IRQHandler
|
|
.type UART0_RX_TX_IRQHandler, %function
|
|
UART0_RX_TX_IRQHandler:
|
|
ldr r0,=UART0_RX_TX_DriverIRQHandler
|
|
bx r0
|
|
.size UART0_RX_TX_IRQHandler, . - UART0_RX_TX_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART0_ERR_IRQHandler
|
|
.type UART0_ERR_IRQHandler, %function
|
|
UART0_ERR_IRQHandler:
|
|
ldr r0,=UART0_ERR_DriverIRQHandler
|
|
bx r0
|
|
.size UART0_ERR_IRQHandler, . - UART0_ERR_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART1_RX_TX_IRQHandler
|
|
.type UART1_RX_TX_IRQHandler, %function
|
|
UART1_RX_TX_IRQHandler:
|
|
ldr r0,=UART1_RX_TX_DriverIRQHandler
|
|
bx r0
|
|
.size UART1_RX_TX_IRQHandler, . - UART1_RX_TX_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART1_ERR_IRQHandler
|
|
.type UART1_ERR_IRQHandler, %function
|
|
UART1_ERR_IRQHandler:
|
|
ldr r0,=UART1_ERR_DriverIRQHandler
|
|
bx r0
|
|
.size UART1_ERR_IRQHandler, . - UART1_ERR_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART2_RX_TX_IRQHandler
|
|
.type UART2_RX_TX_IRQHandler, %function
|
|
UART2_RX_TX_IRQHandler:
|
|
ldr r0,=UART2_RX_TX_DriverIRQHandler
|
|
bx r0
|
|
.size UART2_RX_TX_IRQHandler, . - UART2_RX_TX_IRQHandler
|
|
|
|
.align 1
|
|
.thumb_func
|
|
.weak UART2_ERR_IRQHandler
|
|
.type UART2_ERR_IRQHandler, %function
|
|
UART2_ERR_IRQHandler:
|
|
ldr r0,=UART2_ERR_DriverIRQHandler
|
|
bx r0
|
|
.size UART2_ERR_IRQHandler, . - UART2_ERR_IRQHandler
|
|
|
|
|
|
/* Macro to define default handlers. Default handler
|
|
* will be weak symbol and just dead loops. They can be
|
|
* overwritten by other handlers */
|
|
.macro def_irq_handler handler_name
|
|
.weak \handler_name
|
|
.set \handler_name, DefaultISR
|
|
.endm
|
|
|
|
/* Exception Handlers */
|
|
def_irq_handler MemManage_Handler
|
|
def_irq_handler BusFault_Handler
|
|
def_irq_handler UsageFault_Handler
|
|
def_irq_handler DebugMon_Handler
|
|
def_irq_handler DMA0_DriverIRQHandler
|
|
def_irq_handler DMA1_DriverIRQHandler
|
|
def_irq_handler DMA2_DriverIRQHandler
|
|
def_irq_handler DMA3_DriverIRQHandler
|
|
def_irq_handler DMA4_DriverIRQHandler
|
|
def_irq_handler DMA5_DriverIRQHandler
|
|
def_irq_handler DMA6_DriverIRQHandler
|
|
def_irq_handler DMA7_DriverIRQHandler
|
|
def_irq_handler DMA8_DriverIRQHandler
|
|
def_irq_handler DMA9_DriverIRQHandler
|
|
def_irq_handler DMA10_DriverIRQHandler
|
|
def_irq_handler DMA11_DriverIRQHandler
|
|
def_irq_handler DMA12_DriverIRQHandler
|
|
def_irq_handler DMA13_DriverIRQHandler
|
|
def_irq_handler DMA14_DriverIRQHandler
|
|
def_irq_handler DMA15_DriverIRQHandler
|
|
def_irq_handler DMA_Error_DriverIRQHandler
|
|
def_irq_handler MCM_IRQHandler
|
|
def_irq_handler FTF_IRQHandler
|
|
def_irq_handler Read_Collision_IRQHandler
|
|
def_irq_handler LVD_LVW_IRQHandler
|
|
def_irq_handler LLWU_IRQHandler
|
|
def_irq_handler WDOG_EWM_IRQHandler
|
|
def_irq_handler RNG_IRQHandler
|
|
def_irq_handler I2C0_DriverIRQHandler
|
|
def_irq_handler I2C1_DriverIRQHandler
|
|
def_irq_handler SPI0_DriverIRQHandler
|
|
def_irq_handler SPI1_DriverIRQHandler
|
|
def_irq_handler I2S0_Tx_DriverIRQHandler
|
|
def_irq_handler I2S0_Rx_DriverIRQHandler
|
|
def_irq_handler LPUART0_DriverIRQHandler
|
|
def_irq_handler UART0_RX_TX_DriverIRQHandler
|
|
def_irq_handler UART0_ERR_DriverIRQHandler
|
|
def_irq_handler UART1_RX_TX_DriverIRQHandler
|
|
def_irq_handler UART1_ERR_DriverIRQHandler
|
|
def_irq_handler UART2_RX_TX_DriverIRQHandler
|
|
def_irq_handler UART2_ERR_DriverIRQHandler
|
|
def_irq_handler Reserved53_IRQHandler
|
|
def_irq_handler Reserved54_IRQHandler
|
|
def_irq_handler ADC0_IRQHandler
|
|
def_irq_handler CMP0_IRQHandler
|
|
def_irq_handler CMP1_IRQHandler
|
|
def_irq_handler FTM0_IRQHandler
|
|
def_irq_handler FTM1_IRQHandler
|
|
def_irq_handler FTM2_IRQHandler
|
|
def_irq_handler Reserved61_IRQHandler
|
|
def_irq_handler RTC_IRQHandler
|
|
def_irq_handler RTC_Seconds_IRQHandler
|
|
def_irq_handler PIT0_IRQHandler
|
|
def_irq_handler PIT1_IRQHandler
|
|
def_irq_handler PIT2_IRQHandler
|
|
def_irq_handler PIT3_IRQHandler
|
|
def_irq_handler PDB0_IRQHandler
|
|
def_irq_handler USB0_IRQHandler
|
|
def_irq_handler Reserved70_IRQHandler
|
|
def_irq_handler Reserved71_IRQHandler
|
|
def_irq_handler DAC0_IRQHandler
|
|
def_irq_handler MCG_IRQHandler
|
|
def_irq_handler LPTMR0_IRQHandler
|
|
def_irq_handler PORTA_IRQHandler
|
|
def_irq_handler PORTB_IRQHandler
|
|
def_irq_handler PORTC_IRQHandler
|
|
def_irq_handler PORTD_IRQHandler
|
|
def_irq_handler PORTE_IRQHandler
|
|
def_irq_handler SWI_IRQHandler
|
|
def_irq_handler Reserved81_IRQHandler
|
|
def_irq_handler Reserved82_IRQHandler
|
|
def_irq_handler Reserved83_IRQHandler
|
|
def_irq_handler Reserved84_IRQHandler
|
|
def_irq_handler Reserved85_IRQHandler
|
|
def_irq_handler Reserved86_IRQHandler
|
|
def_irq_handler FTM3_IRQHandler
|
|
def_irq_handler DAC1_IRQHandler
|
|
def_irq_handler ADC1_IRQHandler
|
|
def_irq_handler Reserved90_IRQHandler
|
|
def_irq_handler Reserved91_IRQHandler
|
|
def_irq_handler Reserved92_IRQHandler
|
|
def_irq_handler Reserved93_IRQHandler
|
|
def_irq_handler Reserved94_IRQHandler
|
|
def_irq_handler Reserved95_IRQHandler
|
|
def_irq_handler Reserved96_IRQHandler
|
|
def_irq_handler Reserved97_IRQHandler
|
|
def_irq_handler Reserved98_IRQHandler
|
|
def_irq_handler Reserved99_IRQHandler
|
|
def_irq_handler Reserved100_IRQHandler
|
|
def_irq_handler Reserved101_IRQHandler
|
|
|
|
.end
|